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PCI: Refactor pcie_update_link_speed()
pcie_update_link_speed() is passed the Link Status register but not all callers have that value at hand nor need the value. Refactor pcie_update_link_speed() to include reading the Link Status register and create __pcie_update_link_speed() which can be used by the hotplug code that has the register value at hand beforehand (and needs the value for other purposes). Link: https://lore.kernel.org/r/20241018144755.7875-5-ilpo.jarvinen@linux.intel.com Signed-off-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
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@ -319,7 +319,7 @@ int pciehp_check_link_status(struct controller *ctrl)
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return -1;
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}
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pcie_update_link_speed(ctrl->pcie->port->subordinate, lnk_status);
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__pcie_update_link_speed(ctrl->pcie->port->subordinate, lnk_status);
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if (!found) {
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ctrl_info(ctrl, "Slot(%s): No device found\n",
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@ -379,7 +379,12 @@ enum pci_bus_speed pcie_get_speed_cap(struct pci_dev *dev);
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enum pcie_link_width pcie_get_width_cap(struct pci_dev *dev);
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void __pcie_print_link_status(struct pci_dev *dev, bool verbose);
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void pcie_report_downtraining(struct pci_dev *dev);
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void pcie_update_link_speed(struct pci_bus *bus, u16 link_status);
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static inline void __pcie_update_link_speed(struct pci_bus *bus, u16 linksta)
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{
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bus->cur_bus_speed = pcie_link_speed[linksta & PCI_EXP_LNKSTA_CLS];
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}
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void pcie_update_link_speed(struct pci_bus *bus);
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/* Single Root I/O Virtualization */
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struct pci_sriov {
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@ -742,9 +742,13 @@ const char *pci_speed_string(enum pci_bus_speed speed)
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}
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EXPORT_SYMBOL_GPL(pci_speed_string);
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void pcie_update_link_speed(struct pci_bus *bus, u16 linksta)
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void pcie_update_link_speed(struct pci_bus *bus)
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{
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bus->cur_bus_speed = pcie_link_speed[linksta & PCI_EXP_LNKSTA_CLS];
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struct pci_dev *bridge = bus->self;
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u16 linksta;
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pcie_capability_read_word(bridge, PCI_EXP_LNKSTA, &linksta);
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__pcie_update_link_speed(bus, linksta);
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}
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EXPORT_SYMBOL_GPL(pcie_update_link_speed);
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@ -827,13 +831,11 @@ static void pci_set_bus_speed(struct pci_bus *bus)
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if (pci_is_pcie(bridge)) {
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u32 linkcap;
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u16 linksta;
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pcie_capability_read_dword(bridge, PCI_EXP_LNKCAP, &linkcap);
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bus->max_bus_speed = pcie_link_speed[linkcap & PCI_EXP_LNKCAP_SLS];
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pcie_capability_read_word(bridge, PCI_EXP_LNKSTA, &linksta);
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pcie_update_link_speed(bus, linksta);
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pcie_update_link_speed(bus);
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}
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}
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