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mips, bpf: Remove old BPF JIT implementations
This patch removes the old 32-bit cBPF and 64-bit eBPF JIT implementations. They are replaced by a new eBPF implementation that supports both 32-bit and 64-bit MIPS CPUs. Signed-off-by: Johan Almbladh <johan.almbladh@anyfinetworks.com> Signed-off-by: Daniel Borkmann <daniel@iogearbox.net> Signed-off-by: Andrii Nakryiko <andrii@kernel.org> Link: https://lore.kernel.org/bpf/20211005165408.2305108-8-johan.almbladh@anyfinetworks.com
This commit is contained in:
Johan Almbladh
Andrii Nakryiko
parent
01bdc58e94
commit
ebcbacfa50
File diff suppressed because it is too large
Load Diff
@ -1,81 +0,0 @@
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/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* Just-In-Time compiler for BPF filters on MIPS
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*
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* Copyright (c) 2014 Imagination Technologies Ltd.
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* Author: Markos Chandras <markos.chandras@imgtec.com>
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*/
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#ifndef BPF_JIT_MIPS_OP_H
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#define BPF_JIT_MIPS_OP_H
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/* Registers used by JIT */
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#define MIPS_R_ZERO 0
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#define MIPS_R_V0 2
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#define MIPS_R_A0 4
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#define MIPS_R_A1 5
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#define MIPS_R_T4 12
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#define MIPS_R_T5 13
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#define MIPS_R_T6 14
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#define MIPS_R_T7 15
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#define MIPS_R_S0 16
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#define MIPS_R_S1 17
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#define MIPS_R_S2 18
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#define MIPS_R_S3 19
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#define MIPS_R_S4 20
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#define MIPS_R_S5 21
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#define MIPS_R_S6 22
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#define MIPS_R_S7 23
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#define MIPS_R_SP 29
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#define MIPS_R_RA 31
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/* Conditional codes */
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#define MIPS_COND_EQ 0x1
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#define MIPS_COND_GE (0x1 << 1)
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#define MIPS_COND_GT (0x1 << 2)
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#define MIPS_COND_NE (0x1 << 3)
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#define MIPS_COND_ALL (0x1 << 4)
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/* Conditionals on X register or K immediate */
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#define MIPS_COND_X (0x1 << 5)
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#define MIPS_COND_K (0x1 << 6)
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#define r_ret MIPS_R_V0
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/*
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* Use 2 scratch registers to avoid pipeline interlocks.
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* There is no overhead during epilogue and prologue since
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* any of the $s0-$s6 registers will only be preserved if
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* they are going to actually be used.
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*/
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#define r_skb_hl MIPS_R_S0 /* skb header length */
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#define r_skb_data MIPS_R_S1 /* skb actual data */
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#define r_off MIPS_R_S2
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#define r_A MIPS_R_S3
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#define r_X MIPS_R_S4
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#define r_skb MIPS_R_S5
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#define r_M MIPS_R_S6
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#define r_skb_len MIPS_R_S7
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#define r_s0 MIPS_R_T4 /* scratch reg 1 */
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#define r_s1 MIPS_R_T5 /* scratch reg 2 */
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#define r_tmp_imm MIPS_R_T6 /* No need to preserve this */
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#define r_tmp MIPS_R_T7 /* No need to preserve this */
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#define r_zero MIPS_R_ZERO
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#define r_sp MIPS_R_SP
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#define r_ra MIPS_R_RA
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#ifndef __ASSEMBLY__
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/* Declare ASM helpers */
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#define DECLARE_LOAD_FUNC(func) \
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extern u8 func(unsigned long *skb, int offset); \
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extern u8 func##_negative(unsigned long *skb, int offset); \
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extern u8 func##_positive(unsigned long *skb, int offset)
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DECLARE_LOAD_FUNC(sk_load_word);
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DECLARE_LOAD_FUNC(sk_load_half);
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DECLARE_LOAD_FUNC(sk_load_byte);
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#endif
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#endif /* BPF_JIT_MIPS_OP_H */
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@ -1,285 +0,0 @@
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/*
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* bpf_jib_asm.S: Packet/header access helper functions for MIPS/MIPS64 BPF
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* compiler.
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*
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* Copyright (C) 2015 Imagination Technologies Ltd.
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* Author: Markos Chandras <markos.chandras@imgtec.com>
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; version 2 of the License.
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*/
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#include <asm/asm.h>
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#include <asm/isa-rev.h>
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#include <asm/regdef.h>
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#include "bpf_jit.h"
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/* ABI
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*
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* r_skb_hl skb header length
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* r_skb_data skb data
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* r_off(a1) offset register
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* r_A BPF register A
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* r_X PF register X
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* r_skb(a0) *skb
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* r_M *scratch memory
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* r_skb_le skb length
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* r_s0 Scratch register 0
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* r_s1 Scratch register 1
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*
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* On entry:
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* a0: *skb
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* a1: offset (imm or imm + X)
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*
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* All non-BPF-ABI registers are free for use. On return, we only
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* care about r_ret. The BPF-ABI registers are assumed to remain
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* unmodified during the entire filter operation.
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*/
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#define skb a0
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#define offset a1
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#define SKF_LL_OFF (-0x200000) /* Can't include linux/filter.h in assembly */
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/* We know better :) so prevent assembler reordering etc */
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.set noreorder
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#define is_offset_negative(TYPE) \
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/* If offset is negative we have more work to do */ \
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slti t0, offset, 0; \
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bgtz t0, bpf_slow_path_##TYPE##_neg; \
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/* Be careful what follows in DS. */
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#define is_offset_in_header(SIZE, TYPE) \
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/* Reading from header? */ \
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addiu $r_s0, $r_skb_hl, -SIZE; \
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slt t0, $r_s0, offset; \
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bgtz t0, bpf_slow_path_##TYPE; \
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LEAF(sk_load_word)
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is_offset_negative(word)
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FEXPORT(sk_load_word_positive)
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is_offset_in_header(4, word)
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/* Offset within header boundaries */
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PTR_ADDU t1, $r_skb_data, offset
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.set reorder
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lw $r_A, 0(t1)
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.set noreorder
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#ifdef CONFIG_CPU_LITTLE_ENDIAN
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# if MIPS_ISA_REV >= 2
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wsbh t0, $r_A
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rotr $r_A, t0, 16
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# else
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sll t0, $r_A, 24
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srl t1, $r_A, 24
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srl t2, $r_A, 8
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or t0, t0, t1
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andi t2, t2, 0xff00
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andi t1, $r_A, 0xff00
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or t0, t0, t2
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sll t1, t1, 8
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or $r_A, t0, t1
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# endif
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#endif
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jr $r_ra
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move $r_ret, zero
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END(sk_load_word)
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LEAF(sk_load_half)
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is_offset_negative(half)
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FEXPORT(sk_load_half_positive)
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is_offset_in_header(2, half)
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/* Offset within header boundaries */
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PTR_ADDU t1, $r_skb_data, offset
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lhu $r_A, 0(t1)
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#ifdef CONFIG_CPU_LITTLE_ENDIAN
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# if MIPS_ISA_REV >= 2
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wsbh $r_A, $r_A
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# else
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sll t0, $r_A, 8
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srl t1, $r_A, 8
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andi t0, t0, 0xff00
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or $r_A, t0, t1
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# endif
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#endif
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jr $r_ra
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move $r_ret, zero
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END(sk_load_half)
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LEAF(sk_load_byte)
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is_offset_negative(byte)
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FEXPORT(sk_load_byte_positive)
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is_offset_in_header(1, byte)
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/* Offset within header boundaries */
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PTR_ADDU t1, $r_skb_data, offset
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lbu $r_A, 0(t1)
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jr $r_ra
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move $r_ret, zero
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END(sk_load_byte)
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/*
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* call skb_copy_bits:
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* (prototype in linux/skbuff.h)
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*
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* int skb_copy_bits(sk_buff *skb, int offset, void *to, int len)
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*
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* o32 mandates we leave 4 spaces for argument registers in case
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* the callee needs to use them. Even though we don't care about
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* the argument registers ourselves, we need to allocate that space
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* to remain ABI compliant since the callee may want to use that space.
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* We also allocate 2 more spaces for $r_ra and our return register (*to).
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*
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* n64 is a bit different. The *caller* will allocate the space to preserve
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* the arguments. So in 64-bit kernels, we allocate the 4-arg space for no
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* good reason but it does not matter that much really.
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*
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* (void *to) is returned in r_s0
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*
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*/
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#ifdef CONFIG_CPU_LITTLE_ENDIAN
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#define DS_OFFSET(SIZE) (4 * SZREG)
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#else
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#define DS_OFFSET(SIZE) ((4 * SZREG) + (4 - SIZE))
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#endif
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#define bpf_slow_path_common(SIZE) \
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/* Quick check. Are we within reasonable boundaries? */ \
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LONG_ADDIU $r_s1, $r_skb_len, -SIZE; \
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sltu $r_s0, offset, $r_s1; \
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beqz $r_s0, fault; \
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/* Load 4th argument in DS */ \
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LONG_ADDIU a3, zero, SIZE; \
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PTR_ADDIU $r_sp, $r_sp, -(6 * SZREG); \
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PTR_LA t0, skb_copy_bits; \
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PTR_S $r_ra, (5 * SZREG)($r_sp); \
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/* Assign low slot to a2 */ \
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PTR_ADDIU a2, $r_sp, DS_OFFSET(SIZE); \
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jalr t0; \
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/* Reset our destination slot (DS but it's ok) */ \
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INT_S zero, (4 * SZREG)($r_sp); \
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/* \
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* skb_copy_bits returns 0 on success and -EFAULT \
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* on error. Our data live in a2. Do not bother with \
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* our data if an error has been returned. \
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*/ \
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/* Restore our frame */ \
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PTR_L $r_ra, (5 * SZREG)($r_sp); \
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INT_L $r_s0, (4 * SZREG)($r_sp); \
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bltz v0, fault; \
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PTR_ADDIU $r_sp, $r_sp, 6 * SZREG; \
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move $r_ret, zero; \
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NESTED(bpf_slow_path_word, (6 * SZREG), $r_sp)
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bpf_slow_path_common(4)
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#ifdef CONFIG_CPU_LITTLE_ENDIAN
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# if MIPS_ISA_REV >= 2
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wsbh t0, $r_s0
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jr $r_ra
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rotr $r_A, t0, 16
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# else
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sll t0, $r_s0, 24
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srl t1, $r_s0, 24
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srl t2, $r_s0, 8
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or t0, t0, t1
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andi t2, t2, 0xff00
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andi t1, $r_s0, 0xff00
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or t0, t0, t2
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sll t1, t1, 8
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jr $r_ra
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or $r_A, t0, t1
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# endif
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#else
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jr $r_ra
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move $r_A, $r_s0
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#endif
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END(bpf_slow_path_word)
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NESTED(bpf_slow_path_half, (6 * SZREG), $r_sp)
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bpf_slow_path_common(2)
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#ifdef CONFIG_CPU_LITTLE_ENDIAN
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# if MIPS_ISA_REV >= 2
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jr $r_ra
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wsbh $r_A, $r_s0
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# else
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sll t0, $r_s0, 8
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andi t1, $r_s0, 0xff00
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andi t0, t0, 0xff00
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srl t1, t1, 8
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jr $r_ra
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or $r_A, t0, t1
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# endif
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#else
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jr $r_ra
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move $r_A, $r_s0
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#endif
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END(bpf_slow_path_half)
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NESTED(bpf_slow_path_byte, (6 * SZREG), $r_sp)
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bpf_slow_path_common(1)
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jr $r_ra
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move $r_A, $r_s0
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END(bpf_slow_path_byte)
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/*
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* Negative entry points
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*/
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.macro bpf_is_end_of_data
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li t0, SKF_LL_OFF
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/* Reading link layer data? */
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slt t1, offset, t0
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bgtz t1, fault
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/* Be careful what follows in DS. */
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.endm
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/*
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* call skb_copy_bits:
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* (prototype in linux/filter.h)
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*
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* void *bpf_internal_load_pointer_neg_helper(const struct sk_buff *skb,
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* int k, unsigned int size)
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*
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* see above (bpf_slow_path_common) for ABI restrictions
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*/
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#define bpf_negative_common(SIZE) \
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PTR_ADDIU $r_sp, $r_sp, -(6 * SZREG); \
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PTR_LA t0, bpf_internal_load_pointer_neg_helper; \
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PTR_S $r_ra, (5 * SZREG)($r_sp); \
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jalr t0; \
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li a2, SIZE; \
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PTR_L $r_ra, (5 * SZREG)($r_sp); \
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/* Check return pointer */ \
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beqz v0, fault; \
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PTR_ADDIU $r_sp, $r_sp, 6 * SZREG; \
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/* Preserve our pointer */ \
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move $r_s0, v0; \
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/* Set return value */ \
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move $r_ret, zero; \
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bpf_slow_path_word_neg:
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bpf_is_end_of_data
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NESTED(sk_load_word_negative, (6 * SZREG), $r_sp)
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bpf_negative_common(4)
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jr $r_ra
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lw $r_A, 0($r_s0)
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END(sk_load_word_negative)
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bpf_slow_path_half_neg:
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bpf_is_end_of_data
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NESTED(sk_load_half_negative, (6 * SZREG), $r_sp)
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bpf_negative_common(2)
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jr $r_ra
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lhu $r_A, 0($r_s0)
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END(sk_load_half_negative)
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bpf_slow_path_byte_neg:
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bpf_is_end_of_data
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NESTED(sk_load_byte_negative, (6 * SZREG), $r_sp)
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bpf_negative_common(1)
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jr $r_ra
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lbu $r_A, 0($r_s0)
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END(sk_load_byte_negative)
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fault:
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jr $r_ra
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addiu $r_ret, zero, 1
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File diff suppressed because it is too large
Load Diff
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