mirror of
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
synced 2025-01-18 02:46:06 +00:00
regmap: Provide basic test coverage for raw I/O
Merge series from Mark Brown <broonie@kernel.org>: Our existing coverage only deals with buses that provide single register read and write operations, extend it to cover raw buses using a similar approach with a RAM backed register map that the tests can inspect to check operations. This coverage could be more complete but provides a good start.
This commit is contained in:
Mark Brown
commit
ecfb8ce26d
@ -8,7 +8,7 @@ obj-$(CONFIG_DEBUG_FS) += regmap-debugfs.o
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obj-$(CONFIG_REGMAP_KUNIT) += regmap-kunit.o
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obj-$(CONFIG_REGMAP_AC97) += regmap-ac97.o
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obj-$(CONFIG_REGMAP_I2C) += regmap-i2c.o
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obj-$(CONFIG_REGMAP_RAM) += regmap-ram.o
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obj-$(CONFIG_REGMAP_RAM) += regmap-ram.o regmap-raw-ram.o
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obj-$(CONFIG_REGMAP_SLIMBUS) += regmap-slimbus.o
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obj-$(CONFIG_REGMAP_SPI) += regmap-spi.o
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obj-$(CONFIG_REGMAP_SPMI) += regmap-spmi.o
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@ -314,6 +314,7 @@ struct regmap_ram_data {
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unsigned int *vals; /* Allocatd by caller */
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bool *read;
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bool *written;
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enum regmap_endian reg_endian;
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};
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/*
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@ -328,5 +329,12 @@ struct regmap *__regmap_init_ram(const struct regmap_config *config,
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#define regmap_init_ram(config, data) \
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__regmap_lockdep_wrapper(__regmap_init_ram, #config, config, data)
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struct regmap *__regmap_init_raw_ram(const struct regmap_config *config,
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struct regmap_ram_data *data,
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struct lock_class_key *lock_key,
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const char *lock_name);
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#define regmap_init_raw_ram(config, data) \
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__regmap_lockdep_wrapper(__regmap_init_raw_ram, #config, config, data)
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#endif
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@ -712,6 +712,327 @@ static void cache_drop(struct kunit *test)
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regmap_exit(map);
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}
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struct raw_test_types {
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const char *name;
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enum regcache_type cache_type;
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enum regmap_endian val_endian;
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};
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static void raw_to_desc(const struct raw_test_types *t, char *desc)
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{
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strcpy(desc, t->name);
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}
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static const struct raw_test_types raw_types_list[] = {
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{ "none-little", REGCACHE_NONE, REGMAP_ENDIAN_LITTLE },
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{ "none-big", REGCACHE_NONE, REGMAP_ENDIAN_BIG },
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{ "flat-little", REGCACHE_FLAT, REGMAP_ENDIAN_LITTLE },
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{ "flat-big", REGCACHE_FLAT, REGMAP_ENDIAN_BIG },
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{ "rbtree-little", REGCACHE_RBTREE, REGMAP_ENDIAN_LITTLE },
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{ "rbtree-big", REGCACHE_RBTREE, REGMAP_ENDIAN_BIG },
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{ "maple-little", REGCACHE_MAPLE, REGMAP_ENDIAN_LITTLE },
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{ "maple-big", REGCACHE_MAPLE, REGMAP_ENDIAN_BIG },
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};
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KUNIT_ARRAY_PARAM(raw_test_types, raw_types_list, raw_to_desc);
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static const struct raw_test_types raw_cache_types_list[] = {
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{ "flat-little", REGCACHE_FLAT, REGMAP_ENDIAN_LITTLE },
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{ "flat-big", REGCACHE_FLAT, REGMAP_ENDIAN_BIG },
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{ "rbtree-little", REGCACHE_RBTREE, REGMAP_ENDIAN_LITTLE },
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{ "rbtree-big", REGCACHE_RBTREE, REGMAP_ENDIAN_BIG },
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{ "maple-little", REGCACHE_MAPLE, REGMAP_ENDIAN_LITTLE },
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{ "maple-big", REGCACHE_MAPLE, REGMAP_ENDIAN_BIG },
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};
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KUNIT_ARRAY_PARAM(raw_test_cache_types, raw_cache_types_list, raw_to_desc);
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static const struct regmap_config raw_regmap_config = {
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.max_register = BLOCK_TEST_SIZE,
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.reg_format_endian = REGMAP_ENDIAN_LITTLE,
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.reg_bits = 16,
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.val_bits = 16,
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};
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static struct regmap *gen_raw_regmap(struct regmap_config *config,
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struct raw_test_types *test_type,
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struct regmap_ram_data **data)
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{
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u16 *buf;
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struct regmap *ret;
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size_t size = (config->max_register + 1) * config->reg_bits / 8;
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int i;
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struct reg_default *defaults;
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config->cache_type = test_type->cache_type;
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config->val_format_endian = test_type->val_endian;
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buf = kmalloc(size, GFP_KERNEL);
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if (!buf)
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return ERR_PTR(-ENOMEM);
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get_random_bytes(buf, size);
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*data = kzalloc(sizeof(**data), GFP_KERNEL);
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if (!(*data))
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return ERR_PTR(-ENOMEM);
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(*data)->vals = (void *)buf;
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config->num_reg_defaults = config->max_register + 1;
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defaults = kcalloc(config->num_reg_defaults,
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sizeof(struct reg_default),
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GFP_KERNEL);
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if (!defaults)
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return ERR_PTR(-ENOMEM);
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config->reg_defaults = defaults;
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for (i = 0; i < config->num_reg_defaults; i++) {
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defaults[i].reg = i;
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switch (test_type->val_endian) {
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case REGMAP_ENDIAN_LITTLE:
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defaults[i].def = le16_to_cpu(buf[i]);
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break;
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case REGMAP_ENDIAN_BIG:
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defaults[i].def = be16_to_cpu(buf[i]);
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break;
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default:
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return ERR_PTR(-EINVAL);
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}
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}
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/*
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* We use the defaults in the tests but they don't make sense
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* to the core if there's no cache.
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*/
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if (config->cache_type == REGCACHE_NONE)
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config->num_reg_defaults = 0;
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ret = regmap_init_raw_ram(config, *data);
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if (IS_ERR(ret)) {
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kfree(buf);
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kfree(*data);
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}
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return ret;
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}
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static void raw_read_defaults_single(struct kunit *test)
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{
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struct raw_test_types *t = (struct raw_test_types *)test->param_value;
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struct regmap *map;
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struct regmap_config config;
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struct regmap_ram_data *data;
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unsigned int rval;
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int i;
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config = raw_regmap_config;
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map = gen_raw_regmap(&config, t, &data);
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KUNIT_ASSERT_FALSE(test, IS_ERR(map));
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if (IS_ERR(map))
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return;
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/* Check that we can read the defaults via the API */
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for (i = 0; i < config.max_register + 1; i++) {
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KUNIT_EXPECT_EQ(test, 0, regmap_read(map, i, &rval));
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KUNIT_EXPECT_EQ(test, config.reg_defaults[i].def, rval);
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}
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regmap_exit(map);
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}
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static void raw_read_defaults(struct kunit *test)
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{
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struct raw_test_types *t = (struct raw_test_types *)test->param_value;
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struct regmap *map;
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struct regmap_config config;
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struct regmap_ram_data *data;
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u16 *rval;
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u16 def;
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size_t val_len;
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int i;
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config = raw_regmap_config;
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map = gen_raw_regmap(&config, t, &data);
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KUNIT_ASSERT_FALSE(test, IS_ERR(map));
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if (IS_ERR(map))
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return;
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val_len = sizeof(*rval) * (config.max_register + 1);
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rval = kmalloc(val_len, GFP_KERNEL);
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KUNIT_ASSERT_TRUE(test, rval != NULL);
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if (!rval)
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return;
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/* Check that we can read the defaults via the API */
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KUNIT_EXPECT_EQ(test, 0, regmap_raw_read(map, 0, rval, val_len));
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for (i = 0; i < config.max_register + 1; i++) {
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def = config.reg_defaults[i].def;
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if (config.val_format_endian == REGMAP_ENDIAN_BIG) {
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KUNIT_EXPECT_EQ(test, def, be16_to_cpu(rval[i]));
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} else {
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KUNIT_EXPECT_EQ(test, def, le16_to_cpu(rval[i]));
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}
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}
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kfree(rval);
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regmap_exit(map);
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}
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static void raw_write_read_single(struct kunit *test)
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{
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struct raw_test_types *t = (struct raw_test_types *)test->param_value;
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struct regmap *map;
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struct regmap_config config;
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struct regmap_ram_data *data;
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u16 val;
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unsigned int rval;
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config = raw_regmap_config;
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map = gen_raw_regmap(&config, t, &data);
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KUNIT_ASSERT_FALSE(test, IS_ERR(map));
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if (IS_ERR(map))
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return;
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get_random_bytes(&val, sizeof(val));
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/* If we write a value to a register we can read it back */
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KUNIT_EXPECT_EQ(test, 0, regmap_write(map, 0, val));
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KUNIT_EXPECT_EQ(test, 0, regmap_read(map, 0, &rval));
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KUNIT_EXPECT_EQ(test, val, rval);
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regmap_exit(map);
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}
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static void raw_write(struct kunit *test)
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{
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struct raw_test_types *t = (struct raw_test_types *)test->param_value;
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struct regmap *map;
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struct regmap_config config;
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struct regmap_ram_data *data;
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u16 *hw_buf;
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u16 val[2];
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unsigned int rval;
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int i;
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config = raw_regmap_config;
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map = gen_raw_regmap(&config, t, &data);
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KUNIT_ASSERT_FALSE(test, IS_ERR(map));
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if (IS_ERR(map))
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return;
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hw_buf = (u16 *)data->vals;
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get_random_bytes(&val, sizeof(val));
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/* Do a raw write */
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KUNIT_EXPECT_EQ(test, 0, regmap_raw_write(map, 2, val, sizeof(val)));
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/* We should read back the new values, and defaults for the rest */
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for (i = 0; i < config.max_register + 1; i++) {
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KUNIT_EXPECT_EQ(test, 0, regmap_read(map, i, &rval));
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switch (i) {
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case 2:
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case 3:
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if (config.val_format_endian == REGMAP_ENDIAN_BIG) {
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KUNIT_EXPECT_EQ(test, rval,
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be16_to_cpu(val[i % 2]));
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} else {
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KUNIT_EXPECT_EQ(test, rval,
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le16_to_cpu(val[i % 2]));
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}
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break;
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default:
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KUNIT_EXPECT_EQ(test, config.reg_defaults[i].def, rval);
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break;
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}
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}
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/* The values should appear in the "hardware" */
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KUNIT_EXPECT_MEMEQ(test, &hw_buf[2], val, sizeof(val));
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regmap_exit(map);
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}
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static void raw_sync(struct kunit *test)
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{
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struct raw_test_types *t = (struct raw_test_types *)test->param_value;
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struct regmap *map;
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struct regmap_config config;
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struct regmap_ram_data *data;
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u16 val[2];
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u16 *hw_buf;
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unsigned int rval;
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int i;
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config = raw_regmap_config;
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map = gen_raw_regmap(&config, t, &data);
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KUNIT_ASSERT_FALSE(test, IS_ERR(map));
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if (IS_ERR(map))
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return;
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hw_buf = (u16 *)data->vals;
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get_random_bytes(&val, sizeof(val));
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/* Do a regular write and a raw write in cache only mode */
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regcache_cache_only(map, true);
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KUNIT_EXPECT_EQ(test, 0, regmap_raw_write(map, 2, val, sizeof(val)));
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if (config.val_format_endian == REGMAP_ENDIAN_BIG)
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KUNIT_EXPECT_EQ(test, 0, regmap_write(map, 6,
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be16_to_cpu(val[0])));
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else
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KUNIT_EXPECT_EQ(test, 0, regmap_write(map, 6,
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le16_to_cpu(val[0])));
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/* We should read back the new values, and defaults for the rest */
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for (i = 0; i < config.max_register + 1; i++) {
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KUNIT_EXPECT_EQ(test, 0, regmap_read(map, i, &rval));
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switch (i) {
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case 2:
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case 3:
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case 6:
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if (config.val_format_endian == REGMAP_ENDIAN_BIG) {
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KUNIT_EXPECT_EQ(test, rval,
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be16_to_cpu(val[i % 2]));
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} else {
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KUNIT_EXPECT_EQ(test, rval,
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le16_to_cpu(val[i % 2]));
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}
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break;
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default:
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KUNIT_EXPECT_EQ(test, config.reg_defaults[i].def, rval);
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break;
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}
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}
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/* The values should not appear in the "hardware" */
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KUNIT_EXPECT_MEMNEQ(test, &hw_buf[2], val, sizeof(val));
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KUNIT_EXPECT_MEMNEQ(test, &hw_buf[6], val, sizeof(u16));
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for (i = 0; i < config.max_register + 1; i++)
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data->written[i] = false;
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/* Do the sync */
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regcache_cache_only(map, false);
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regcache_mark_dirty(map);
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KUNIT_EXPECT_EQ(test, 0, regcache_sync(map));
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/* The values should now appear in the "hardware" */
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KUNIT_EXPECT_MEMEQ(test, &hw_buf[2], val, sizeof(val));
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KUNIT_EXPECT_MEMEQ(test, &hw_buf[6], val, sizeof(u16));
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regmap_exit(map);
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}
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static struct kunit_case regmap_test_cases[] = {
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KUNIT_CASE_PARAM(basic_read_write, regcache_types_gen_params),
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KUNIT_CASE_PARAM(bulk_write, regcache_types_gen_params),
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@ -727,6 +1048,12 @@ static struct kunit_case regmap_test_cases[] = {
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KUNIT_CASE_PARAM(cache_sync_defaults, real_cache_types_gen_params),
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KUNIT_CASE_PARAM(cache_sync_patch, real_cache_types_gen_params),
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KUNIT_CASE_PARAM(cache_drop, sparse_cache_types_gen_params),
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KUNIT_CASE_PARAM(raw_read_defaults_single, raw_test_types_gen_params),
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KUNIT_CASE_PARAM(raw_read_defaults, raw_test_types_gen_params),
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KUNIT_CASE_PARAM(raw_write_read_single, raw_test_types_gen_params),
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KUNIT_CASE_PARAM(raw_write, raw_test_types_gen_params),
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KUNIT_CASE_PARAM(raw_sync, raw_test_cache_types_gen_params),
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{}
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};
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133
drivers/base/regmap/regmap-raw-ram.c
Normal file
133
drivers/base/regmap/regmap-raw-ram.c
Normal file
@ -0,0 +1,133 @@
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// SPDX-License-Identifier: GPL-2.0
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//
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// Register map access API - Memory region with raw access
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//
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// This is intended for testing only
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//
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// Copyright (c) 2023, Arm Ltd
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#include <linux/clk.h>
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#include <linux/err.h>
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#include <linux/io.h>
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#include <linux/module.h>
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#include <linux/regmap.h>
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#include <linux/slab.h>
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#include <linux/swab.h>
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#include "internal.h"
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static unsigned int decode_reg(enum regmap_endian endian, const void *reg)
|
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{
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const u16 *r = reg;
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if (endian == REGMAP_ENDIAN_BIG)
|
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return be16_to_cpu(*r);
|
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else
|
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return le16_to_cpu(*r);
|
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}
|
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|
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static int regmap_raw_ram_gather_write(void *context,
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const void *reg, size_t reg_len,
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const void *val, size_t val_len)
|
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{
|
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struct regmap_ram_data *data = context;
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unsigned int r;
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u16 *our_buf = (u16 *)data->vals;
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int i;
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if (reg_len != 2)
|
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return -EINVAL;
|
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if (val_len % 2)
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return -EINVAL;
|
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|
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r = decode_reg(data->reg_endian, reg);
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memcpy(&our_buf[r], val, val_len);
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|
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for (i = 0; i < val_len / 2; i++)
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data->written[r + i] = true;
|
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|
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return 0;
|
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}
|
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|
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static int regmap_raw_ram_write(void *context, const void *data, size_t count)
|
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{
|
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return regmap_raw_ram_gather_write(context, data, 2,
|
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data + 2, count - 2);
|
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}
|
||||
|
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static int regmap_raw_ram_read(void *context,
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const void *reg, size_t reg_len,
|
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void *val, size_t val_len)
|
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{
|
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struct regmap_ram_data *data = context;
|
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unsigned int r;
|
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u16 *our_buf = (u16 *)data->vals;
|
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int i;
|
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|
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if (reg_len != 2)
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return -EINVAL;
|
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if (val_len % 2)
|
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return -EINVAL;
|
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|
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r = decode_reg(data->reg_endian, reg);
|
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memcpy(val, &our_buf[r], val_len);
|
||||
|
||||
for (i = 0; i < val_len / 2; i++)
|
||||
data->read[r + i] = true;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static void regmap_raw_ram_free_context(void *context)
|
||||
{
|
||||
struct regmap_ram_data *data = context;
|
||||
|
||||
kfree(data->vals);
|
||||
kfree(data->read);
|
||||
kfree(data->written);
|
||||
kfree(data);
|
||||
}
|
||||
|
||||
static const struct regmap_bus regmap_raw_ram = {
|
||||
.fast_io = true,
|
||||
.write = regmap_raw_ram_write,
|
||||
.gather_write = regmap_raw_ram_gather_write,
|
||||
.read = regmap_raw_ram_read,
|
||||
.free_context = regmap_raw_ram_free_context,
|
||||
};
|
||||
|
||||
struct regmap *__regmap_init_raw_ram(const struct regmap_config *config,
|
||||
struct regmap_ram_data *data,
|
||||
struct lock_class_key *lock_key,
|
||||
const char *lock_name)
|
||||
{
|
||||
struct regmap *map;
|
||||
|
||||
if (config->reg_bits != 16)
|
||||
return ERR_PTR(-EINVAL);
|
||||
|
||||
if (!config->max_register) {
|
||||
pr_crit("No max_register specified for RAM regmap\n");
|
||||
return ERR_PTR(-EINVAL);
|
||||
}
|
||||
|
||||
data->read = kcalloc(sizeof(bool), config->max_register + 1,
|
||||
GFP_KERNEL);
|
||||
if (!data->read)
|
||||
return ERR_PTR(-ENOMEM);
|
||||
|
||||
data->written = kcalloc(sizeof(bool), config->max_register + 1,
|
||||
GFP_KERNEL);
|
||||
if (!data->written)
|
||||
return ERR_PTR(-ENOMEM);
|
||||
|
||||
data->reg_endian = config->reg_format_endian;
|
||||
|
||||
map = __regmap_init(NULL, ®map_raw_ram, data, config,
|
||||
lock_key, lock_name);
|
||||
|
||||
return map;
|
||||
}
|
||||
EXPORT_SYMBOL_GPL(__regmap_init_raw_ram);
|
||||
|
||||
MODULE_LICENSE("GPL v2");
|
||||
Loading…
x
Reference in New Issue
Block a user