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https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
synced 2025-01-18 02:46:06 +00:00
omap3 nand: fix issue in board file to detect nand
Board file modified for not to provide gpmc phys_base address to nand driver. The gpmc_nand_init funciton is now used to detect the nand and required to adopt _prob function as in nand/omap2.c Signed-off-by: Sukumar Ghorai <s-ghorai@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
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@ -61,8 +61,6 @@
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#define SB_T35_SMSC911X_GPIO 65
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#define NAND_BLOCK_SIZE SZ_128K
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#define GPMC_CS0_BASE 0x60
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#define GPMC_CS0_BASE_ADDR (OMAP34XX_GPMC_VIRT + GPMC_CS0_BASE)
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#if defined(CONFIG_SMSC911X) || defined(CONFIG_SMSC911X_MODULE)
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#include <linux/smsc911x.h>
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@ -223,28 +221,12 @@ static struct omap_nand_platform_data cm_t35_nand_data = {
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.nr_parts = ARRAY_SIZE(cm_t35_nand_partitions),
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.dma_channel = -1, /* disable DMA in OMAP NAND driver */
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.cs = 0,
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.gpmc_cs_baseaddr = (void __iomem *)GPMC_CS0_BASE_ADDR,
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.gpmc_baseaddr = (void __iomem *)OMAP34XX_GPMC_VIRT,
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};
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static struct resource cm_t35_nand_resource = {
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.flags = IORESOURCE_MEM,
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};
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static struct platform_device cm_t35_nand_device = {
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.name = "omap2-nand",
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.id = -1,
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.num_resources = 1,
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.resource = &cm_t35_nand_resource,
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.dev = {
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.platform_data = &cm_t35_nand_data,
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},
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};
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static void __init cm_t35_init_nand(void)
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{
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if (platform_device_register(&cm_t35_nand_device) < 0)
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if (gpmc_nand_init(&cm_t35_nand_data) < 0)
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pr_err("CM-T35: Unable to register NAND device\n");
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}
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#else
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@ -59,9 +59,6 @@
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#include "mux.h"
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#include "hsmmc.h"
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#define GPMC_CS0_BASE 0x60
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#define GPMC_CS_SIZE 0x30
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#define NAND_BLOCK_SIZE SZ_128K
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#define OMAP_DM9000_GPIO_IRQ 25
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@ -105,20 +102,6 @@ static struct omap_nand_platform_data devkit8000_nand_data = {
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.dma_channel = -1, /* disable DMA in OMAP NAND driver */
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};
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static struct resource devkit8000_nand_resource = {
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.flags = IORESOURCE_MEM,
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};
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static struct platform_device devkit8000_nand_device = {
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.name = "omap2-nand",
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.id = -1,
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.dev = {
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.platform_data = &devkit8000_nand_data,
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},
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.num_resources = 1,
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.resource = &devkit8000_nand_resource,
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};
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static struct omap2_hsmmc_info mmc[] = {
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{
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.mmc = 1,
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@ -591,8 +574,6 @@ static void __init devkit8000_flash_init(void)
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u8 cs = 0;
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u8 nandcs = GPMC_CS_NUM + 1;
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u32 gpmc_base_add = OMAP34XX_GPMC_VIRT;
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/* find out the chip-select on which NAND exists */
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while (cs < GPMC_CS_NUM) {
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u32 ret = 0;
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@ -614,13 +595,9 @@ static void __init devkit8000_flash_init(void)
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if (nandcs < GPMC_CS_NUM) {
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devkit8000_nand_data.cs = nandcs;
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devkit8000_nand_data.gpmc_cs_baseaddr = (void *)
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(gpmc_base_add + GPMC_CS0_BASE + nandcs * GPMC_CS_SIZE);
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devkit8000_nand_data.gpmc_baseaddr = (void *)
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(gpmc_base_add);
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printk(KERN_INFO "Registering NAND on CS%d\n", nandcs);
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if (platform_device_register(&devkit8000_nand_device) < 0)
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if (gpmc_nand_init(&devkit8000_nand_data) < 0)
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printk(KERN_ERR "Unable to register NAND device\n");
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}
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}
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@ -48,9 +48,6 @@
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#include "mux.h"
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#include "hsmmc.h"
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#define GPMC_CS0_BASE 0x60
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#define GPMC_CS_SIZE 0x30
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#define NAND_BLOCK_SIZE SZ_128K
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static struct mtd_partition omap3beagle_nand_partitions[] = {
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@ -93,20 +90,6 @@ static struct omap_nand_platform_data omap3beagle_nand_data = {
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.dev_ready = NULL,
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};
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static struct resource omap3beagle_nand_resource = {
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.flags = IORESOURCE_MEM,
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};
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static struct platform_device omap3beagle_nand_device = {
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.name = "omap2-nand",
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.id = -1,
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.dev = {
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.platform_data = &omap3beagle_nand_data,
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},
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.num_resources = 1,
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.resource = &omap3beagle_nand_resource,
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};
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/* DSS */
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static int beagle_enable_dvi(struct omap_dss_device *dssdev)
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@ -424,8 +407,6 @@ static void __init omap3beagle_flash_init(void)
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u8 cs = 0;
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u8 nandcs = GPMC_CS_NUM + 1;
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u32 gpmc_base_add = OMAP34XX_GPMC_VIRT;
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/* find out the chip-select on which NAND exists */
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while (cs < GPMC_CS_NUM) {
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u32 ret = 0;
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@ -447,12 +428,9 @@ static void __init omap3beagle_flash_init(void)
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if (nandcs < GPMC_CS_NUM) {
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omap3beagle_nand_data.cs = nandcs;
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omap3beagle_nand_data.gpmc_cs_baseaddr = (void *)
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(gpmc_base_add + GPMC_CS0_BASE + nandcs * GPMC_CS_SIZE);
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omap3beagle_nand_data.gpmc_baseaddr = (void *) (gpmc_base_add);
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printk(KERN_INFO "Registering NAND on CS%d\n", nandcs);
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if (platform_device_register(&omap3beagle_nand_device) < 0)
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if (gpmc_nand_init(&omap3beagle_nand_data) < 0)
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printk(KERN_ERR "Unable to register NAND device\n");
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}
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}
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@ -54,9 +54,6 @@
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#include <asm/setup.h>
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#define GPMC_CS0_BASE 0x60
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#define GPMC_CS_SIZE 0x30
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#define NAND_BLOCK_SIZE SZ_128K
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#define OMAP3_AC_GPIO 136
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@ -106,20 +103,6 @@ static struct omap_nand_platform_data omap3touchbook_nand_data = {
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.dev_ready = NULL,
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};
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static struct resource omap3touchbook_nand_resource = {
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.flags = IORESOURCE_MEM,
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};
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static struct platform_device omap3touchbook_nand_device = {
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.name = "omap2-nand",
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.id = -1,
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.dev = {
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.platform_data = &omap3touchbook_nand_data,
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},
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.num_resources = 1,
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.resource = &omap3touchbook_nand_resource,
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};
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#include "sdram-micron-mt46h32m32lf-6.h"
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static struct omap2_hsmmc_info mmc[] = {
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@ -458,8 +441,6 @@ static void __init omap3touchbook_flash_init(void)
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u8 cs = 0;
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u8 nandcs = GPMC_CS_NUM + 1;
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u32 gpmc_base_add = OMAP34XX_GPMC_VIRT;
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/* find out the chip-select on which NAND exists */
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while (cs < GPMC_CS_NUM) {
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u32 ret = 0;
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@ -481,13 +462,9 @@ static void __init omap3touchbook_flash_init(void)
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if (nandcs < GPMC_CS_NUM) {
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omap3touchbook_nand_data.cs = nandcs;
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omap3touchbook_nand_data.gpmc_cs_baseaddr = (void *)
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(gpmc_base_add + GPMC_CS0_BASE + nandcs * GPMC_CS_SIZE);
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omap3touchbook_nand_data.gpmc_baseaddr =
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(void *) (gpmc_base_add);
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printk(KERN_INFO "Registering NAND on CS%d\n", nandcs);
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if (platform_device_register(&omap3touchbook_nand_device) < 0)
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if (gpmc_nand_init(&omap3touchbook_nand_data) < 0)
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printk(KERN_ERR "Unable to register NAND device\n");
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}
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}
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@ -58,8 +58,6 @@
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#define OVERO_GPIO_USBH_NRESET 183
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#define NAND_BLOCK_SIZE SZ_128K
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#define GPMC_CS0_BASE 0x60
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#define GPMC_CS_SIZE 0x30
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#define OVERO_SMSC911X_CS 5
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#define OVERO_SMSC911X_GPIO 176
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@ -269,28 +267,11 @@ static struct omap_nand_platform_data overo_nand_data = {
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.dma_channel = -1, /* disable DMA in OMAP NAND driver */
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};
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static struct resource overo_nand_resource = {
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.flags = IORESOURCE_MEM,
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};
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static struct platform_device overo_nand_device = {
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.name = "omap2-nand",
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.id = -1,
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.dev = {
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.platform_data = &overo_nand_data,
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},
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.num_resources = 1,
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.resource = &overo_nand_resource,
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};
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static void __init overo_flash_init(void)
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{
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u8 cs = 0;
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u8 nandcs = GPMC_CS_NUM + 1;
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u32 gpmc_base_add = OMAP34XX_GPMC_VIRT;
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/* find out the chip-select on which NAND exists */
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while (cs < GPMC_CS_NUM) {
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u32 ret = 0;
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@ -312,12 +293,9 @@ static void __init overo_flash_init(void)
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if (nandcs < GPMC_CS_NUM) {
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overo_nand_data.cs = nandcs;
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overo_nand_data.gpmc_cs_baseaddr = (void *)
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(gpmc_base_add + GPMC_CS0_BASE + nandcs * GPMC_CS_SIZE);
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overo_nand_data.gpmc_baseaddr = (void *) (gpmc_base_add);
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printk(KERN_INFO "Registering NAND on CS%d\n", nandcs);
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if (platform_device_register(&overo_nand_device) < 0)
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if (gpmc_nand_init(&overo_nand_data) < 0)
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printk(KERN_ERR "Unable to register NAND device\n");
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}
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}
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@ -162,11 +162,6 @@ __init board_nand_init(struct flash_partitions sdp_nand_parts, u8 cs)
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sdp_nand_data.parts = sdp_nand_parts.parts;
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sdp_nand_data.nr_parts = sdp_nand_parts.nr_parts;
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sdp_nand_data.gpmc_cs_baseaddr = (void *)(OMAP34XX_GPMC_VIRT +
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GPMC_CS0_BASE +
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cs * GPMC_CS_SIZE);
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sdp_nand_data.gpmc_baseaddr = (void *) (OMAP34XX_GPMC_VIRT);
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gpmc_nand_init(&sdp_nand_data);
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}
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#else
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