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staging: qlge: use qlge_* prefix to avoid namespace clashes with other qlogic drivers
To avoid namespace clashes with other qlogic drivers and also for the
sake of naming consistency, use the "qlge_" prefix as suggested in
drivers/staging/qlge/TODO,
- For existing ql_ prefix,
sed -i "s/ql_/qlge_/g" *.{c,h}
- for structs not having a prefix
1. get a list of structs
grep "struct.*{" qlge.
2. add qlge_ for each struct, e.g.,
sed -i "s/ib_ae_iocb_rsp/qlge_ib_ae_iocb_rsp/g" *.{c,h}
Link: https://lore.kernel.org/patchwork/patch/1318503/#1516131
Suggested-by: Benjamin Poirier <benjamin.poirier@gmail.com>
Signed-off-by: Coiby Xu <coiby.xu@gmail.com>
Link: https://lore.kernel.org/r/20210123104613.38359-2-coiby.xu@gmail.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This commit is contained in:
Coiby Xu
Greg Kroah-Hartman
parent
684ceb81dc
commit
f8c047be54
@ -28,10 +28,6 @@
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* the driver has a habit of using runtime checks where compile time checks are
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possible (ex. ql_free_rx_buffers(), ql_alloc_rx_buffers())
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* reorder struct members to avoid holes if it doesn't impact performance
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* in terms of namespace, the driver uses either qlge_, ql_ (used by
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other qlogic drivers, with clashes, ex: ql_sem_spinlock) or nothing (with
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clashes, ex: struct ob_mac_iocb_req). Rename everything to use the "qlge_"
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prefix.
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* avoid legacy/deprecated apis (ex. replace pci_dma_*, replace pci_enable_msi,
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use pci_iomap)
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* some "while" loops could be rewritten with simple "for", ex.
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@ -1081,7 +1081,7 @@ struct tx_buf_desc {
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#define OPCODE_IB_MPI_IOCB 0x21
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#define OPCODE_IB_AE_IOCB 0x3f
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struct ob_mac_iocb_req {
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struct qlge_ob_mac_iocb_req {
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u8 opcode;
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u8 flags1;
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#define OB_MAC_IOCB_REQ_OI 0x01
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@ -1104,7 +1104,7 @@ struct ob_mac_iocb_req {
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struct tx_buf_desc tbd[TX_DESC_PER_IOCB];
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} __packed;
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struct ob_mac_iocb_rsp {
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struct qlge_ob_mac_iocb_rsp {
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u8 opcode; /* */
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u8 flags1; /* */
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#define OB_MAC_IOCB_RSP_OI 0x01 /* */
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@ -1121,7 +1121,7 @@ struct ob_mac_iocb_rsp {
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__le32 reserved[13];
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} __packed;
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struct ob_mac_tso_iocb_req {
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struct qlge_ob_mac_tso_iocb_req {
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u8 opcode;
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u8 flags1;
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#define OB_MAC_TSO_IOCB_OI 0x01
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@ -1149,7 +1149,7 @@ struct ob_mac_tso_iocb_req {
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struct tx_buf_desc tbd[TX_DESC_PER_IOCB];
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} __packed;
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struct ob_mac_tso_iocb_rsp {
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struct qlge_ob_mac_tso_iocb_rsp {
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u8 opcode;
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u8 flags1;
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#define OB_MAC_TSO_IOCB_RSP_OI 0x01
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@ -1166,7 +1166,7 @@ struct ob_mac_tso_iocb_rsp {
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__le32 reserved2[13];
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} __packed;
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struct ib_mac_iocb_rsp {
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struct qlge_ib_mac_iocb_rsp {
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u8 opcode; /* 0x20 */
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u8 flags1;
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#define IB_MAC_IOCB_RSP_OI 0x01 /* Override intr delay */
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@ -1225,7 +1225,7 @@ struct ib_mac_iocb_rsp {
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__le64 hdr_addr; /* */
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} __packed;
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struct ib_ae_iocb_rsp {
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struct qlge_ib_ae_iocb_rsp {
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u8 opcode;
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u8 flags1;
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#define IB_AE_IOCB_RSP_OI 0x01
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@ -1250,7 +1250,7 @@ struct ib_ae_iocb_rsp {
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* These three structures are for generic
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* handling of ib and ob iocbs.
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*/
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struct ql_net_rsp_iocb {
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struct qlge_net_rsp_iocb {
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u8 opcode;
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u8 flags0;
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__le16 length;
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@ -1258,7 +1258,7 @@ struct ql_net_rsp_iocb {
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__le32 reserved[14];
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} __packed;
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struct net_req_iocb {
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struct qlge_net_req_iocb {
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u8 opcode;
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u8 flags0;
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__le16 flags1;
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@ -1346,7 +1346,7 @@ struct ricb {
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/* SOFTWARE/DRIVER DATA STRUCTURES. */
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struct oal {
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struct qlge_oal {
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struct tx_buf_desc oal[TX_DESC_PER_OAL];
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};
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@ -1357,9 +1357,9 @@ struct map_list {
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struct tx_ring_desc {
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struct sk_buff *skb;
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struct ob_mac_iocb_req *queue_entry;
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struct qlge_ob_mac_iocb_req *queue_entry;
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u32 index;
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struct oal oal;
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struct qlge_oal oal;
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struct map_list map[MAX_SKB_FRAGS + 2];
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int map_cnt;
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struct tx_ring_desc *next;
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@ -1388,7 +1388,7 @@ struct tx_ring {
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spinlock_t lock;
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atomic_t tx_count; /* counts down for every outstanding IO */
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struct delayed_work tx_work;
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struct ql_adapter *qdev;
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struct qlge_adapter *qdev;
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u64 tx_packets;
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u64 tx_bytes;
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u64 tx_errors;
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@ -1469,7 +1469,7 @@ struct rx_ring {
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dma_addr_t prod_idx_sh_reg_dma;
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void __iomem *cnsmr_idx_db_reg; /* PCI doorbell mem area + 0 */
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u32 cnsmr_idx; /* current sw idx */
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struct ql_net_rsp_iocb *curr_entry; /* next entry on queue */
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struct qlge_net_rsp_iocb *curr_entry; /* next entry on queue */
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void __iomem *valid_db_reg; /* PCI doorbell mem area + 0x04 */
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/* Large buffer queue elements. */
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@ -1487,7 +1487,7 @@ struct rx_ring {
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char name[IFNAMSIZ + 5];
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struct napi_struct napi;
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u8 reserved;
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struct ql_adapter *qdev;
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struct qlge_adapter *qdev;
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u64 rx_packets;
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u64 rx_multicast;
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u64 rx_bytes;
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@ -1752,14 +1752,14 @@ enum {
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#define SHADOW_OFFSET 0xb0000000
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#define SHADOW_REG_SHIFT 20
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struct ql_nic_misc {
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struct qlge_nic_misc {
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u32 rx_ring_count;
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u32 tx_ring_count;
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u32 intr_count;
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u32 function;
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};
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struct ql_reg_dump {
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struct qlge_reg_dump {
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/* segment 0 */
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struct mpi_coredump_global_header mpi_global_header;
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@ -1769,7 +1769,7 @@ struct ql_reg_dump {
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/* segment 30 */
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struct mpi_coredump_segment_header misc_nic_seg_hdr;
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struct ql_nic_misc misc_nic_info;
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struct qlge_nic_misc misc_nic_info;
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/* segment 31 */
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/* one interrupt state for each CQ */
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@ -1792,7 +1792,7 @@ struct ql_reg_dump {
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u32 ets[8 + 2];
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};
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struct ql_mpi_coredump {
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struct qlge_mpi_coredump {
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/* segment 0 */
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struct mpi_coredump_global_header mpi_global_header;
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@ -1914,7 +1914,7 @@ struct ql_mpi_coredump {
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/* segment 30 */
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struct mpi_coredump_segment_header misc_nic_seg_hdr;
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struct ql_nic_misc misc_nic_info;
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struct qlge_nic_misc misc_nic_info;
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/* segment 31 */
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/* one interrupt state for each CQ */
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@ -1991,7 +1991,7 @@ struct ql_mpi_coredump {
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* irq environment as a context to the ISR.
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*/
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struct intr_context {
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struct ql_adapter *qdev;
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struct qlge_adapter *qdev;
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u32 intr;
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u32 irq_mask; /* Mask of which rings the vector services. */
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u32 hooked;
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@ -2056,15 +2056,15 @@ enum {
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};
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struct nic_operations {
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int (*get_flash)(struct ql_adapter *qdev);
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int (*port_initialize)(struct ql_adapter *qdev);
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int (*get_flash)(struct qlge_adapter *qdev);
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int (*port_initialize)(struct qlge_adapter *qdev);
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};
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/*
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* The main Adapter structure definition.
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* This structure has all fields relevant to the hardware.
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*/
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struct ql_adapter {
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struct qlge_adapter {
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struct ricb ricb;
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unsigned long flags;
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u32 wol;
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@ -2139,7 +2139,7 @@ struct ql_adapter {
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u32 port_link_up;
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u32 port_init;
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u32 link_status;
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struct ql_mpi_coredump *mpi_coredump;
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struct qlge_mpi_coredump *mpi_coredump;
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u32 core_is_dumped;
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u32 link_config;
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u32 led_config;
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@ -2166,7 +2166,7 @@ struct ql_adapter {
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/*
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* Typical Register accessor for memory mapped device.
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*/
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static inline u32 ql_read32(const struct ql_adapter *qdev, int reg)
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static inline u32 qlge_read32(const struct qlge_adapter *qdev, int reg)
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{
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return readl(qdev->reg_base + reg);
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}
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@ -2174,7 +2174,7 @@ static inline u32 ql_read32(const struct ql_adapter *qdev, int reg)
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/*
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* Typical Register accessor for memory mapped device.
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*/
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static inline void ql_write32(const struct ql_adapter *qdev, int reg, u32 val)
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static inline void qlge_write32(const struct qlge_adapter *qdev, int reg, u32 val)
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{
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writel(val, qdev->reg_base + reg);
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}
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@ -2189,7 +2189,7 @@ static inline void ql_write32(const struct ql_adapter *qdev, int reg, u32 val)
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* 1 4k chunk of memory. The lower half of the space is for outbound
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* queues. The upper half is for inbound queues.
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*/
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static inline void ql_write_db_reg(u32 val, void __iomem *addr)
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static inline void qlge_write_db_reg(u32 val, void __iomem *addr)
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{
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writel(val, addr);
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}
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@ -2205,7 +2205,7 @@ static inline void ql_write_db_reg(u32 val, void __iomem *addr)
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* queues. The upper half is for inbound queues.
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* Caller has to guarantee ordering.
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*/
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static inline void ql_write_db_reg_relaxed(u32 val, void __iomem *addr)
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static inline void qlge_write_db_reg_relaxed(u32 val, void __iomem *addr)
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{
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writel_relaxed(val, addr);
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}
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@ -2220,7 +2220,7 @@ static inline void ql_write_db_reg_relaxed(u32 val, void __iomem *addr)
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* update the relevant index register and then copy the value to the
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* shadow register in host memory.
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*/
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static inline u32 ql_read_sh_reg(__le32 *addr)
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static inline u32 qlge_read_sh_reg(__le32 *addr)
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{
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u32 reg;
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@ -2233,51 +2233,51 @@ extern char qlge_driver_name[];
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extern const char qlge_driver_version[];
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extern const struct ethtool_ops qlge_ethtool_ops;
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int ql_sem_spinlock(struct ql_adapter *qdev, u32 sem_mask);
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void ql_sem_unlock(struct ql_adapter *qdev, u32 sem_mask);
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int ql_read_xgmac_reg(struct ql_adapter *qdev, u32 reg, u32 *data);
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int ql_get_mac_addr_reg(struct ql_adapter *qdev, u32 type, u16 index,
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u32 *value);
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int ql_get_routing_reg(struct ql_adapter *qdev, u32 index, u32 *value);
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int ql_write_cfg(struct ql_adapter *qdev, void *ptr, int size, u32 bit,
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u16 q_id);
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void ql_queue_fw_error(struct ql_adapter *qdev);
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void ql_mpi_work(struct work_struct *work);
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void ql_mpi_reset_work(struct work_struct *work);
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void ql_mpi_core_to_log(struct work_struct *work);
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int ql_wait_reg_rdy(struct ql_adapter *qdev, u32 reg, u32 bit, u32 ebit);
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void ql_queue_asic_error(struct ql_adapter *qdev);
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void ql_set_ethtool_ops(struct net_device *ndev);
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int ql_read_xgmac_reg64(struct ql_adapter *qdev, u32 reg, u64 *data);
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void ql_mpi_idc_work(struct work_struct *work);
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void ql_mpi_port_cfg_work(struct work_struct *work);
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int ql_mb_get_fw_state(struct ql_adapter *qdev);
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int ql_cam_route_initialize(struct ql_adapter *qdev);
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int ql_read_mpi_reg(struct ql_adapter *qdev, u32 reg, u32 *data);
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int ql_write_mpi_reg(struct ql_adapter *qdev, u32 reg, u32 data);
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int ql_unpause_mpi_risc(struct ql_adapter *qdev);
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int ql_pause_mpi_risc(struct ql_adapter *qdev);
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int ql_hard_reset_mpi_risc(struct ql_adapter *qdev);
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int ql_soft_reset_mpi_risc(struct ql_adapter *qdev);
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int ql_dump_risc_ram_area(struct ql_adapter *qdev, void *buf, u32 ram_addr,
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int word_count);
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int ql_core_dump(struct ql_adapter *qdev, struct ql_mpi_coredump *mpi_coredump);
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int ql_mb_about_fw(struct ql_adapter *qdev);
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int ql_mb_wol_set_magic(struct ql_adapter *qdev, u32 enable_wol);
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int ql_mb_wol_mode(struct ql_adapter *qdev, u32 wol);
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int ql_mb_set_led_cfg(struct ql_adapter *qdev, u32 led_config);
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int ql_mb_get_led_cfg(struct ql_adapter *qdev);
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void ql_link_on(struct ql_adapter *qdev);
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void ql_link_off(struct ql_adapter *qdev);
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int ql_mb_set_mgmnt_traffic_ctl(struct ql_adapter *qdev, u32 control);
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int ql_mb_get_port_cfg(struct ql_adapter *qdev);
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int ql_mb_set_port_cfg(struct ql_adapter *qdev);
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int ql_wait_fifo_empty(struct ql_adapter *qdev);
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void ql_get_dump(struct ql_adapter *qdev, void *buff);
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netdev_tx_t ql_lb_send(struct sk_buff *skb, struct net_device *ndev);
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void ql_check_lb_frame(struct ql_adapter *qdev, struct sk_buff *skb);
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int ql_own_firmware(struct ql_adapter *qdev);
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int ql_clean_lb_rx_ring(struct rx_ring *rx_ring, int budget);
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int qlge_sem_spinlock(struct qlge_adapter *qdev, u32 sem_mask);
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void qlge_sem_unlock(struct qlge_adapter *qdev, u32 sem_mask);
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int qlge_read_xgmac_reg(struct qlge_adapter *qdev, u32 reg, u32 *data);
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int qlge_get_mac_addr_reg(struct qlge_adapter *qdev, u32 type, u16 index,
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u32 *value);
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int qlge_get_routing_reg(struct qlge_adapter *qdev, u32 index, u32 *value);
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int qlge_write_cfg(struct qlge_adapter *qdev, void *ptr, int size, u32 bit,
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u16 q_id);
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void qlge_queue_fw_error(struct qlge_adapter *qdev);
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void qlge_mpi_work(struct work_struct *work);
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void qlge_mpi_reset_work(struct work_struct *work);
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void qlge_mpi_core_to_log(struct work_struct *work);
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int qlge_wait_reg_rdy(struct qlge_adapter *qdev, u32 reg, u32 bit, u32 ebit);
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void qlge_queue_asic_error(struct qlge_adapter *qdev);
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void qlge_set_ethtool_ops(struct net_device *ndev);
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int qlge_read_xgmac_reg64(struct qlge_adapter *qdev, u32 reg, u64 *data);
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void qlge_mpi_idc_work(struct work_struct *work);
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void qlge_mpi_port_cfg_work(struct work_struct *work);
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int qlge_mb_get_fw_state(struct qlge_adapter *qdev);
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int qlge_cam_route_initialize(struct qlge_adapter *qdev);
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int qlge_read_mpi_reg(struct qlge_adapter *qdev, u32 reg, u32 *data);
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int qlge_write_mpi_reg(struct qlge_adapter *qdev, u32 reg, u32 data);
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int qlge_unpause_mpi_risc(struct qlge_adapter *qdev);
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int qlge_pause_mpi_risc(struct qlge_adapter *qdev);
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int qlge_hard_reset_mpi_risc(struct qlge_adapter *qdev);
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int qlge_soft_reset_mpi_risc(struct qlge_adapter *qdev);
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int qlge_dump_risc_ram_area(struct qlge_adapter *qdev, void *buf, u32 ram_addr,
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int word_count);
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int qlge_core_dump(struct qlge_adapter *qdev, struct qlge_mpi_coredump *mpi_coredump);
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int qlge_mb_about_fw(struct qlge_adapter *qdev);
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int qlge_mb_wol_set_magic(struct qlge_adapter *qdev, u32 enable_wol);
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int qlge_mb_wol_mode(struct qlge_adapter *qdev, u32 wol);
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int qlge_mb_set_led_cfg(struct qlge_adapter *qdev, u32 led_config);
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int qlge_mb_get_led_cfg(struct qlge_adapter *qdev);
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void qlge_link_on(struct qlge_adapter *qdev);
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void qlge_link_off(struct qlge_adapter *qdev);
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int qlge_mb_set_mgmnt_traffic_ctl(struct qlge_adapter *qdev, u32 control);
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int qlge_mb_get_port_cfg(struct qlge_adapter *qdev);
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int qlge_mb_set_port_cfg(struct qlge_adapter *qdev);
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int qlge_wait_fifo_empty(struct qlge_adapter *qdev);
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void qlge_get_dump(struct qlge_adapter *qdev, void *buff);
|
||||
netdev_tx_t qlge_lb_send(struct sk_buff *skb, struct net_device *ndev);
|
||||
void qlge_check_lb_frame(struct qlge_adapter *qdev, struct sk_buff *skb);
|
||||
int qlge_own_firmware(struct qlge_adapter *qdev);
|
||||
int qlge_clean_lb_rx_ring(struct rx_ring *rx_ring, int budget);
|
||||
|
||||
/* #define QL_ALL_DUMP */
|
||||
/* #define QL_REG_DUMP */
|
||||
@ -2287,12 +2287,12 @@ int ql_clean_lb_rx_ring(struct rx_ring *rx_ring, int budget);
|
||||
/* #define QL_OB_DUMP */
|
||||
|
||||
#ifdef QL_REG_DUMP
|
||||
void ql_dump_xgmac_control_regs(struct ql_adapter *qdev);
|
||||
void ql_dump_routing_entries(struct ql_adapter *qdev);
|
||||
void ql_dump_regs(struct ql_adapter *qdev);
|
||||
#define QL_DUMP_REGS(qdev) ql_dump_regs(qdev)
|
||||
#define QL_DUMP_ROUTE(qdev) ql_dump_routing_entries(qdev)
|
||||
#define QL_DUMP_XGMAC_CONTROL_REGS(qdev) ql_dump_xgmac_control_regs(qdev)
|
||||
void qlge_dump_xgmac_control_regs(struct qlge_adapter *qdev);
|
||||
void qlge_dump_routing_entries(struct qlge_adapter *qdev);
|
||||
void qlge_dump_regs(struct qlge_adapter *qdev);
|
||||
#define QL_DUMP_REGS(qdev) qlge_dump_regs(qdev)
|
||||
#define QL_DUMP_ROUTE(qdev) qlge_dump_routing_entries(qdev)
|
||||
#define QL_DUMP_XGMAC_CONTROL_REGS(qdev) qlge_dump_xgmac_control_regs(qdev)
|
||||
#else
|
||||
#define QL_DUMP_REGS(qdev)
|
||||
#define QL_DUMP_ROUTE(qdev)
|
||||
@ -2300,33 +2300,33 @@ void ql_dump_regs(struct ql_adapter *qdev);
|
||||
#endif
|
||||
|
||||
#ifdef QL_STAT_DUMP
|
||||
void ql_dump_stat(struct ql_adapter *qdev);
|
||||
#define QL_DUMP_STAT(qdev) ql_dump_stat(qdev)
|
||||
void qlge_dump_stat(struct qlge_adapter *qdev);
|
||||
#define QL_DUMP_STAT(qdev) qlge_dump_stat(qdev)
|
||||
#else
|
||||
#define QL_DUMP_STAT(qdev)
|
||||
#endif
|
||||
|
||||
#ifdef QL_DEV_DUMP
|
||||
void ql_dump_qdev(struct ql_adapter *qdev);
|
||||
#define QL_DUMP_QDEV(qdev) ql_dump_qdev(qdev)
|
||||
void qlge_dump_qdev(struct qlge_adapter *qdev);
|
||||
#define QL_DUMP_QDEV(qdev) qlge_dump_qdev(qdev)
|
||||
#else
|
||||
#define QL_DUMP_QDEV(qdev)
|
||||
#endif
|
||||
|
||||
#ifdef QL_CB_DUMP
|
||||
void ql_dump_wqicb(struct wqicb *wqicb);
|
||||
void ql_dump_tx_ring(struct tx_ring *tx_ring);
|
||||
void ql_dump_ricb(struct ricb *ricb);
|
||||
void ql_dump_cqicb(struct cqicb *cqicb);
|
||||
void ql_dump_rx_ring(struct rx_ring *rx_ring);
|
||||
void ql_dump_hw_cb(struct ql_adapter *qdev, int size, u32 bit, u16 q_id);
|
||||
#define QL_DUMP_RICB(ricb) ql_dump_ricb(ricb)
|
||||
#define QL_DUMP_WQICB(wqicb) ql_dump_wqicb(wqicb)
|
||||
#define QL_DUMP_TX_RING(tx_ring) ql_dump_tx_ring(tx_ring)
|
||||
#define QL_DUMP_CQICB(cqicb) ql_dump_cqicb(cqicb)
|
||||
#define QL_DUMP_RX_RING(rx_ring) ql_dump_rx_ring(rx_ring)
|
||||
void qlge_dump_wqicb(struct wqicb *wqicb);
|
||||
void qlge_dump_tx_ring(struct tx_ring *tx_ring);
|
||||
void qlge_dump_ricb(struct ricb *ricb);
|
||||
void qlge_dump_cqicb(struct cqicb *cqicb);
|
||||
void qlge_dump_rx_ring(struct rx_ring *rx_ring);
|
||||
void qlge_dump_hw_cb(struct qlge_adapter *qdev, int size, u32 bit, u16 q_id);
|
||||
#define QL_DUMP_RICB(ricb) qlge_dump_ricb(ricb)
|
||||
#define QL_DUMP_WQICB(wqicb) qlge_dump_wqicb(wqicb)
|
||||
#define QL_DUMP_TX_RING(tx_ring) qlge_dump_tx_ring(tx_ring)
|
||||
#define QL_DUMP_CQICB(cqicb) qlge_dump_cqicb(cqicb)
|
||||
#define QL_DUMP_RX_RING(rx_ring) qlge_dump_rx_ring(rx_ring)
|
||||
#define QL_DUMP_HW_CB(qdev, size, bit, q_id) \
|
||||
ql_dump_hw_cb(qdev, size, bit, q_id)
|
||||
qlge_dump_hw_cb(qdev, size, bit, q_id)
|
||||
#else
|
||||
#define QL_DUMP_RICB(ricb)
|
||||
#define QL_DUMP_WQICB(wqicb)
|
||||
@ -2337,26 +2337,26 @@ void ql_dump_hw_cb(struct ql_adapter *qdev, int size, u32 bit, u16 q_id);
|
||||
#endif
|
||||
|
||||
#ifdef QL_OB_DUMP
|
||||
void ql_dump_tx_desc(struct ql_adapter *qdev, struct tx_buf_desc *tbd);
|
||||
void ql_dump_ob_mac_iocb(struct ql_adapter *qdev, struct ob_mac_iocb_req *ob_mac_iocb);
|
||||
void ql_dump_ob_mac_rsp(struct ql_adapter *qdev, struct ob_mac_iocb_rsp *ob_mac_rsp);
|
||||
#define QL_DUMP_OB_MAC_IOCB(qdev, ob_mac_iocb) ql_dump_ob_mac_iocb(qdev, ob_mac_iocb)
|
||||
#define QL_DUMP_OB_MAC_RSP(qdev, ob_mac_rsp) ql_dump_ob_mac_rsp(qdev, ob_mac_rsp)
|
||||
void qlge_dump_tx_desc(struct qlge_adapter *qdev, struct tx_buf_desc *tbd);
|
||||
void qlge_dump_ob_mac_iocb(struct qlge_adapter *qdev, struct qlge_ob_mac_iocb_req *ob_mac_iocb);
|
||||
void qlge_dump_ob_mac_rsp(struct qlge_adapter *qdev, struct qlge_ob_mac_iocb_rsp *ob_mac_rsp);
|
||||
#define QL_DUMP_OB_MAC_IOCB(qdev, ob_mac_iocb) qlge_dump_ob_mac_iocb(qdev, ob_mac_iocb)
|
||||
#define QL_DUMP_OB_MAC_RSP(qdev, ob_mac_rsp) qlge_dump_ob_mac_rsp(qdev, ob_mac_rsp)
|
||||
#else
|
||||
#define QL_DUMP_OB_MAC_IOCB(qdev, ob_mac_iocb)
|
||||
#define QL_DUMP_OB_MAC_RSP(qdev, ob_mac_rsp)
|
||||
#endif
|
||||
|
||||
#ifdef QL_IB_DUMP
|
||||
void ql_dump_ib_mac_rsp(struct ql_adapter *qdev, struct ib_mac_iocb_rsp *ib_mac_rsp);
|
||||
#define QL_DUMP_IB_MAC_RSP(qdev, ib_mac_rsp) ql_dump_ib_mac_rsp(qdev, ib_mac_rsp)
|
||||
void qlge_dump_ib_mac_rsp(struct qlge_adapter *qdev, struct qlge_ib_mac_iocb_rsp *ib_mac_rsp);
|
||||
#define QL_DUMP_IB_MAC_RSP(qdev, ib_mac_rsp) qlge_dump_ib_mac_rsp(qdev, ib_mac_rsp)
|
||||
#else
|
||||
#define QL_DUMP_IB_MAC_RSP(qdev, ib_mac_rsp)
|
||||
#endif
|
||||
|
||||
#ifdef QL_ALL_DUMP
|
||||
void ql_dump_all(struct ql_adapter *qdev);
|
||||
#define QL_DUMP_ALL(qdev) ql_dump_all(qdev)
|
||||
void qlge_dump_all(struct qlge_adapter *qdev);
|
||||
#define QL_DUMP_ALL(qdev) qlge_dump_all(qdev)
|
||||
#else
|
||||
#define QL_DUMP_ALL(qdev)
|
||||
#endif
|
||||
|
||||
File diff suppressed because it is too large
Load Diff
@ -34,16 +34,16 @@
|
||||
|
||||
#include "qlge.h"
|
||||
|
||||
struct ql_stats {
|
||||
struct qlge_stats {
|
||||
char stat_string[ETH_GSTRING_LEN];
|
||||
int sizeof_stat;
|
||||
int stat_offset;
|
||||
};
|
||||
|
||||
#define QL_SIZEOF(m) sizeof_field(struct ql_adapter, m)
|
||||
#define QL_OFF(m) offsetof(struct ql_adapter, m)
|
||||
#define QL_SIZEOF(m) sizeof_field(struct qlge_adapter, m)
|
||||
#define QL_OFF(m) offsetof(struct qlge_adapter, m)
|
||||
|
||||
static const struct ql_stats ql_gstrings_stats[] = {
|
||||
static const struct qlge_stats qlge_gstrings_stats[] = {
|
||||
{"tx_pkts", QL_SIZEOF(nic_stats.tx_pkts), QL_OFF(nic_stats.tx_pkts)},
|
||||
{"tx_bytes", QL_SIZEOF(nic_stats.tx_bytes), QL_OFF(nic_stats.tx_bytes)},
|
||||
{"tx_mcast_pkts", QL_SIZEOF(nic_stats.tx_mcast_pkts),
|
||||
@ -175,15 +175,15 @@ static const struct ql_stats ql_gstrings_stats[] = {
|
||||
QL_OFF(nic_stats.rx_nic_fifo_drop)},
|
||||
};
|
||||
|
||||
static const char ql_gstrings_test[][ETH_GSTRING_LEN] = {
|
||||
static const char qlge_gstrings_test[][ETH_GSTRING_LEN] = {
|
||||
"Loopback test (offline)"
|
||||
};
|
||||
|
||||
#define QLGE_TEST_LEN (sizeof(ql_gstrings_test) / ETH_GSTRING_LEN)
|
||||
#define QLGE_STATS_LEN ARRAY_SIZE(ql_gstrings_stats)
|
||||
#define QLGE_TEST_LEN (sizeof(qlge_gstrings_test) / ETH_GSTRING_LEN)
|
||||
#define QLGE_STATS_LEN ARRAY_SIZE(qlge_gstrings_stats)
|
||||
#define QLGE_RCV_MAC_ERR_STATS 7
|
||||
|
||||
static int ql_update_ring_coalescing(struct ql_adapter *qdev)
|
||||
static int qlge_update_ring_coalescing(struct qlge_adapter *qdev)
|
||||
{
|
||||
int i, status = 0;
|
||||
struct rx_ring *rx_ring;
|
||||
@ -203,10 +203,10 @@ static int ql_update_ring_coalescing(struct ql_adapter *qdev)
|
||||
cqicb = (struct cqicb *)rx_ring;
|
||||
cqicb->irq_delay = cpu_to_le16(qdev->tx_coalesce_usecs);
|
||||
cqicb->pkt_delay =
|
||||
cpu_to_le16(qdev->tx_max_coalesced_frames);
|
||||
cpu_to_le16(qdev->tx_max_coalesced_frames);
|
||||
cqicb->flags = FLAGS_LI;
|
||||
status = ql_write_cfg(qdev, cqicb, sizeof(*cqicb),
|
||||
CFG_LCQ, rx_ring->cq_id);
|
||||
status = qlge_write_cfg(qdev, cqicb, sizeof(*cqicb),
|
||||
CFG_LCQ, rx_ring->cq_id);
|
||||
if (status) {
|
||||
netif_err(qdev, ifup, qdev->ndev,
|
||||
"Failed to load CQICB.\n");
|
||||
@ -224,10 +224,10 @@ static int ql_update_ring_coalescing(struct ql_adapter *qdev)
|
||||
cqicb = (struct cqicb *)rx_ring;
|
||||
cqicb->irq_delay = cpu_to_le16(qdev->rx_coalesce_usecs);
|
||||
cqicb->pkt_delay =
|
||||
cpu_to_le16(qdev->rx_max_coalesced_frames);
|
||||
cpu_to_le16(qdev->rx_max_coalesced_frames);
|
||||
cqicb->flags = FLAGS_LI;
|
||||
status = ql_write_cfg(qdev, cqicb, sizeof(*cqicb),
|
||||
CFG_LCQ, rx_ring->cq_id);
|
||||
status = qlge_write_cfg(qdev, cqicb, sizeof(*cqicb),
|
||||
CFG_LCQ, rx_ring->cq_id);
|
||||
if (status) {
|
||||
netif_err(qdev, ifup, qdev->ndev,
|
||||
"Failed to load CQICB.\n");
|
||||
@ -239,14 +239,14 @@ exit:
|
||||
return status;
|
||||
}
|
||||
|
||||
static void ql_update_stats(struct ql_adapter *qdev)
|
||||
static void qlge_update_stats(struct qlge_adapter *qdev)
|
||||
{
|
||||
u32 i;
|
||||
u64 data;
|
||||
u64 *iter = &qdev->nic_stats.tx_pkts;
|
||||
|
||||
spin_lock(&qdev->stats_lock);
|
||||
if (ql_sem_spinlock(qdev, qdev->xg_sem_mask)) {
|
||||
if (qlge_sem_spinlock(qdev, qdev->xg_sem_mask)) {
|
||||
netif_err(qdev, drv, qdev->ndev,
|
||||
"Couldn't get xgmac sem.\n");
|
||||
goto quit;
|
||||
@ -255,7 +255,7 @@ static void ql_update_stats(struct ql_adapter *qdev)
|
||||
* Get TX statistics.
|
||||
*/
|
||||
for (i = 0x200; i < 0x280; i += 8) {
|
||||
if (ql_read_xgmac_reg64(qdev, i, &data)) {
|
||||
if (qlge_read_xgmac_reg64(qdev, i, &data)) {
|
||||
netif_err(qdev, drv, qdev->ndev,
|
||||
"Error reading status register 0x%.04x.\n",
|
||||
i);
|
||||
@ -270,7 +270,7 @@ static void ql_update_stats(struct ql_adapter *qdev)
|
||||
* Get RX statistics.
|
||||
*/
|
||||
for (i = 0x300; i < 0x3d0; i += 8) {
|
||||
if (ql_read_xgmac_reg64(qdev, i, &data)) {
|
||||
if (qlge_read_xgmac_reg64(qdev, i, &data)) {
|
||||
netif_err(qdev, drv, qdev->ndev,
|
||||
"Error reading status register 0x%.04x.\n",
|
||||
i);
|
||||
@ -288,7 +288,7 @@ static void ql_update_stats(struct ql_adapter *qdev)
|
||||
* Get Per-priority TX pause frame counter statistics.
|
||||
*/
|
||||
for (i = 0x500; i < 0x540; i += 8) {
|
||||
if (ql_read_xgmac_reg64(qdev, i, &data)) {
|
||||
if (qlge_read_xgmac_reg64(qdev, i, &data)) {
|
||||
netif_err(qdev, drv, qdev->ndev,
|
||||
"Error reading status register 0x%.04x.\n",
|
||||
i);
|
||||
@ -303,7 +303,7 @@ static void ql_update_stats(struct ql_adapter *qdev)
|
||||
* Get Per-priority RX pause frame counter statistics.
|
||||
*/
|
||||
for (i = 0x568; i < 0x5a8; i += 8) {
|
||||
if (ql_read_xgmac_reg64(qdev, i, &data)) {
|
||||
if (qlge_read_xgmac_reg64(qdev, i, &data)) {
|
||||
netif_err(qdev, drv, qdev->ndev,
|
||||
"Error reading status register 0x%.04x.\n",
|
||||
i);
|
||||
@ -317,7 +317,7 @@ static void ql_update_stats(struct ql_adapter *qdev)
|
||||
/*
|
||||
* Get RX NIC FIFO DROP statistics.
|
||||
*/
|
||||
if (ql_read_xgmac_reg64(qdev, 0x5b8, &data)) {
|
||||
if (qlge_read_xgmac_reg64(qdev, 0x5b8, &data)) {
|
||||
netif_err(qdev, drv, qdev->ndev,
|
||||
"Error reading status register 0x%.04x.\n", i);
|
||||
goto end;
|
||||
@ -325,32 +325,32 @@ static void ql_update_stats(struct ql_adapter *qdev)
|
||||
*iter = data;
|
||||
}
|
||||
end:
|
||||
ql_sem_unlock(qdev, qdev->xg_sem_mask);
|
||||
qlge_sem_unlock(qdev, qdev->xg_sem_mask);
|
||||
quit:
|
||||
spin_unlock(&qdev->stats_lock);
|
||||
|
||||
QL_DUMP_STAT(qdev);
|
||||
}
|
||||
|
||||
static void ql_get_strings(struct net_device *dev, u32 stringset, u8 *buf)
|
||||
static void qlge_get_strings(struct net_device *dev, u32 stringset, u8 *buf)
|
||||
{
|
||||
int index;
|
||||
|
||||
switch (stringset) {
|
||||
case ETH_SS_TEST:
|
||||
memcpy(buf, *ql_gstrings_test, QLGE_TEST_LEN * ETH_GSTRING_LEN);
|
||||
memcpy(buf, *qlge_gstrings_test, QLGE_TEST_LEN * ETH_GSTRING_LEN);
|
||||
break;
|
||||
case ETH_SS_STATS:
|
||||
for (index = 0; index < QLGE_STATS_LEN; index++) {
|
||||
memcpy(buf + index * ETH_GSTRING_LEN,
|
||||
ql_gstrings_stats[index].stat_string,
|
||||
qlge_gstrings_stats[index].stat_string,
|
||||
ETH_GSTRING_LEN);
|
||||
}
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
static int ql_get_sset_count(struct net_device *dev, int sset)
|
||||
static int qlge_get_sset_count(struct net_device *dev, int sset)
|
||||
{
|
||||
switch (sset) {
|
||||
case ETH_SS_TEST:
|
||||
@ -363,34 +363,34 @@ static int ql_get_sset_count(struct net_device *dev, int sset)
|
||||
}
|
||||
|
||||
static void
|
||||
ql_get_ethtool_stats(struct net_device *ndev,
|
||||
struct ethtool_stats *stats, u64 *data)
|
||||
qlge_get_ethtool_stats(struct net_device *ndev,
|
||||
struct ethtool_stats *stats, u64 *data)
|
||||
{
|
||||
struct ql_adapter *qdev = netdev_priv(ndev);
|
||||
struct qlge_adapter *qdev = netdev_priv(ndev);
|
||||
int index, length;
|
||||
|
||||
length = QLGE_STATS_LEN;
|
||||
ql_update_stats(qdev);
|
||||
qlge_update_stats(qdev);
|
||||
|
||||
for (index = 0; index < length; index++) {
|
||||
char *p = (char *)qdev +
|
||||
ql_gstrings_stats[index].stat_offset;
|
||||
*data++ = (ql_gstrings_stats[index].sizeof_stat ==
|
||||
sizeof(u64)) ? *(u64 *)p : (*(u32 *)p);
|
||||
qlge_gstrings_stats[index].stat_offset;
|
||||
*data++ = (qlge_gstrings_stats[index].sizeof_stat ==
|
||||
sizeof(u64)) ? *(u64 *)p : (*(u32 *)p);
|
||||
}
|
||||
}
|
||||
|
||||
static int ql_get_link_ksettings(struct net_device *ndev,
|
||||
struct ethtool_link_ksettings *ecmd)
|
||||
static int qlge_get_link_ksettings(struct net_device *ndev,
|
||||
struct ethtool_link_ksettings *ecmd)
|
||||
{
|
||||
struct ql_adapter *qdev = netdev_priv(ndev);
|
||||
struct qlge_adapter *qdev = netdev_priv(ndev);
|
||||
u32 supported, advertising;
|
||||
|
||||
supported = SUPPORTED_10000baseT_Full;
|
||||
advertising = ADVERTISED_10000baseT_Full;
|
||||
|
||||
if ((qdev->link_status & STS_LINK_TYPE_MASK) ==
|
||||
STS_LINK_TYPE_10GBASET) {
|
||||
STS_LINK_TYPE_10GBASET) {
|
||||
supported |= (SUPPORTED_TP | SUPPORTED_Autoneg);
|
||||
advertising |= (ADVERTISED_TP | ADVERTISED_Autoneg);
|
||||
ecmd->base.port = PORT_TP;
|
||||
@ -412,10 +412,10 @@ static int ql_get_link_ksettings(struct net_device *ndev,
|
||||
return 0;
|
||||
}
|
||||
|
||||
static void ql_get_drvinfo(struct net_device *ndev,
|
||||
struct ethtool_drvinfo *drvinfo)
|
||||
static void qlge_get_drvinfo(struct net_device *ndev,
|
||||
struct ethtool_drvinfo *drvinfo)
|
||||
{
|
||||
struct ql_adapter *qdev = netdev_priv(ndev);
|
||||
struct qlge_adapter *qdev = netdev_priv(ndev);
|
||||
|
||||
strlcpy(drvinfo->driver, qlge_driver_name, sizeof(drvinfo->driver));
|
||||
strlcpy(drvinfo->version, qlge_driver_version,
|
||||
@ -429,9 +429,9 @@ static void ql_get_drvinfo(struct net_device *ndev,
|
||||
sizeof(drvinfo->bus_info));
|
||||
}
|
||||
|
||||
static void ql_get_wol(struct net_device *ndev, struct ethtool_wolinfo *wol)
|
||||
static void qlge_get_wol(struct net_device *ndev, struct ethtool_wolinfo *wol)
|
||||
{
|
||||
struct ql_adapter *qdev = netdev_priv(ndev);
|
||||
struct qlge_adapter *qdev = netdev_priv(ndev);
|
||||
unsigned short ssys_dev = qdev->pdev->subsystem_device;
|
||||
|
||||
/* WOL is only supported for mezz card. */
|
||||
@ -442,9 +442,9 @@ static void ql_get_wol(struct net_device *ndev, struct ethtool_wolinfo *wol)
|
||||
}
|
||||
}
|
||||
|
||||
static int ql_set_wol(struct net_device *ndev, struct ethtool_wolinfo *wol)
|
||||
static int qlge_set_wol(struct net_device *ndev, struct ethtool_wolinfo *wol)
|
||||
{
|
||||
struct ql_adapter *qdev = netdev_priv(ndev);
|
||||
struct qlge_adapter *qdev = netdev_priv(ndev);
|
||||
unsigned short ssys_dev = qdev->pdev->subsystem_device;
|
||||
|
||||
/* WOL is only supported for mezz card. */
|
||||
@ -462,25 +462,25 @@ static int ql_set_wol(struct net_device *ndev, struct ethtool_wolinfo *wol)
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int ql_set_phys_id(struct net_device *ndev,
|
||||
enum ethtool_phys_id_state state)
|
||||
static int qlge_set_phys_id(struct net_device *ndev,
|
||||
enum ethtool_phys_id_state state)
|
||||
|
||||
{
|
||||
struct ql_adapter *qdev = netdev_priv(ndev);
|
||||
struct qlge_adapter *qdev = netdev_priv(ndev);
|
||||
|
||||
switch (state) {
|
||||
case ETHTOOL_ID_ACTIVE:
|
||||
/* Save the current LED settings */
|
||||
if (ql_mb_get_led_cfg(qdev))
|
||||
if (qlge_mb_get_led_cfg(qdev))
|
||||
return -EIO;
|
||||
|
||||
/* Start blinking */
|
||||
ql_mb_set_led_cfg(qdev, QL_LED_BLINK);
|
||||
qlge_mb_set_led_cfg(qdev, QL_LED_BLINK);
|
||||
return 0;
|
||||
|
||||
case ETHTOOL_ID_INACTIVE:
|
||||
/* Restore LED settings */
|
||||
if (ql_mb_set_led_cfg(qdev, qdev->led_config))
|
||||
if (qlge_mb_set_led_cfg(qdev, qdev->led_config))
|
||||
return -EIO;
|
||||
return 0;
|
||||
|
||||
@ -489,7 +489,7 @@ static int ql_set_phys_id(struct net_device *ndev,
|
||||
}
|
||||
}
|
||||
|
||||
static int ql_start_loopback(struct ql_adapter *qdev)
|
||||
static int qlge_start_loopback(struct qlge_adapter *qdev)
|
||||
{
|
||||
if (netif_carrier_ok(qdev->ndev)) {
|
||||
set_bit(QL_LB_LINK_UP, &qdev->flags);
|
||||
@ -498,21 +498,21 @@ static int ql_start_loopback(struct ql_adapter *qdev)
|
||||
clear_bit(QL_LB_LINK_UP, &qdev->flags);
|
||||
}
|
||||
qdev->link_config |= CFG_LOOPBACK_PCS;
|
||||
return ql_mb_set_port_cfg(qdev);
|
||||
return qlge_mb_set_port_cfg(qdev);
|
||||
}
|
||||
|
||||
static void ql_stop_loopback(struct ql_adapter *qdev)
|
||||
static void qlge_stop_loopback(struct qlge_adapter *qdev)
|
||||
{
|
||||
qdev->link_config &= ~CFG_LOOPBACK_PCS;
|
||||
ql_mb_set_port_cfg(qdev);
|
||||
qlge_mb_set_port_cfg(qdev);
|
||||
if (test_bit(QL_LB_LINK_UP, &qdev->flags)) {
|
||||
netif_carrier_on(qdev->ndev);
|
||||
clear_bit(QL_LB_LINK_UP, &qdev->flags);
|
||||
}
|
||||
}
|
||||
|
||||
static void ql_create_lb_frame(struct sk_buff *skb,
|
||||
unsigned int frame_size)
|
||||
static void qlge_create_lb_frame(struct sk_buff *skb,
|
||||
unsigned int frame_size)
|
||||
{
|
||||
memset(skb->data, 0xFF, frame_size);
|
||||
frame_size &= ~1;
|
||||
@ -521,8 +521,8 @@ static void ql_create_lb_frame(struct sk_buff *skb,
|
||||
skb->data[frame_size / 2 + 12] = (unsigned char)0xAF;
|
||||
}
|
||||
|
||||
void ql_check_lb_frame(struct ql_adapter *qdev,
|
||||
struct sk_buff *skb)
|
||||
void qlge_check_lb_frame(struct qlge_adapter *qdev,
|
||||
struct sk_buff *skb)
|
||||
{
|
||||
unsigned int frame_size = skb->len;
|
||||
|
||||
@ -534,7 +534,7 @@ void ql_check_lb_frame(struct ql_adapter *qdev,
|
||||
}
|
||||
}
|
||||
|
||||
static int ql_run_loopback_test(struct ql_adapter *qdev)
|
||||
static int qlge_run_loopback_test(struct qlge_adapter *qdev)
|
||||
{
|
||||
int i;
|
||||
netdev_tx_t rc;
|
||||
@ -548,33 +548,33 @@ static int ql_run_loopback_test(struct ql_adapter *qdev)
|
||||
|
||||
skb->queue_mapping = 0;
|
||||
skb_put(skb, size);
|
||||
ql_create_lb_frame(skb, size);
|
||||
rc = ql_lb_send(skb, qdev->ndev);
|
||||
qlge_create_lb_frame(skb, size);
|
||||
rc = qlge_lb_send(skb, qdev->ndev);
|
||||
if (rc != NETDEV_TX_OK)
|
||||
return -EPIPE;
|
||||
atomic_inc(&qdev->lb_count);
|
||||
}
|
||||
/* Give queue time to settle before testing results. */
|
||||
msleep(2);
|
||||
ql_clean_lb_rx_ring(&qdev->rx_ring[0], 128);
|
||||
qlge_clean_lb_rx_ring(&qdev->rx_ring[0], 128);
|
||||
return atomic_read(&qdev->lb_count) ? -EIO : 0;
|
||||
}
|
||||
|
||||
static int ql_loopback_test(struct ql_adapter *qdev, u64 *data)
|
||||
static int qlge_loopback_test(struct qlge_adapter *qdev, u64 *data)
|
||||
{
|
||||
*data = ql_start_loopback(qdev);
|
||||
*data = qlge_start_loopback(qdev);
|
||||
if (*data)
|
||||
goto out;
|
||||
*data = ql_run_loopback_test(qdev);
|
||||
*data = qlge_run_loopback_test(qdev);
|
||||
out:
|
||||
ql_stop_loopback(qdev);
|
||||
qlge_stop_loopback(qdev);
|
||||
return *data;
|
||||
}
|
||||
|
||||
static void ql_self_test(struct net_device *ndev,
|
||||
struct ethtool_test *eth_test, u64 *data)
|
||||
static void qlge_self_test(struct net_device *ndev,
|
||||
struct ethtool_test *eth_test, u64 *data)
|
||||
{
|
||||
struct ql_adapter *qdev = netdev_priv(ndev);
|
||||
struct qlge_adapter *qdev = netdev_priv(ndev);
|
||||
|
||||
memset(data, 0, sizeof(u64) * QLGE_TEST_LEN);
|
||||
|
||||
@ -582,7 +582,7 @@ static void ql_self_test(struct net_device *ndev,
|
||||
set_bit(QL_SELFTEST, &qdev->flags);
|
||||
if (eth_test->flags == ETH_TEST_FL_OFFLINE) {
|
||||
/* Offline tests */
|
||||
if (ql_loopback_test(qdev, &data[0]))
|
||||
if (qlge_loopback_test(qdev, &data[0]))
|
||||
eth_test->flags |= ETH_TEST_FL_FAILED;
|
||||
|
||||
} else {
|
||||
@ -601,32 +601,32 @@ static void ql_self_test(struct net_device *ndev,
|
||||
}
|
||||
}
|
||||
|
||||
static int ql_get_regs_len(struct net_device *ndev)
|
||||
static int qlge_get_regs_len(struct net_device *ndev)
|
||||
{
|
||||
struct ql_adapter *qdev = netdev_priv(ndev);
|
||||
struct qlge_adapter *qdev = netdev_priv(ndev);
|
||||
|
||||
if (!test_bit(QL_FRC_COREDUMP, &qdev->flags))
|
||||
return sizeof(struct ql_mpi_coredump);
|
||||
return sizeof(struct qlge_mpi_coredump);
|
||||
else
|
||||
return sizeof(struct ql_reg_dump);
|
||||
return sizeof(struct qlge_reg_dump);
|
||||
}
|
||||
|
||||
static void ql_get_regs(struct net_device *ndev,
|
||||
struct ethtool_regs *regs, void *p)
|
||||
static void qlge_get_regs(struct net_device *ndev,
|
||||
struct ethtool_regs *regs, void *p)
|
||||
{
|
||||
struct ql_adapter *qdev = netdev_priv(ndev);
|
||||
struct qlge_adapter *qdev = netdev_priv(ndev);
|
||||
|
||||
ql_get_dump(qdev, p);
|
||||
qlge_get_dump(qdev, p);
|
||||
qdev->core_is_dumped = 0;
|
||||
if (!test_bit(QL_FRC_COREDUMP, &qdev->flags))
|
||||
regs->len = sizeof(struct ql_mpi_coredump);
|
||||
regs->len = sizeof(struct qlge_mpi_coredump);
|
||||
else
|
||||
regs->len = sizeof(struct ql_reg_dump);
|
||||
regs->len = sizeof(struct qlge_reg_dump);
|
||||
}
|
||||
|
||||
static int ql_get_coalesce(struct net_device *dev, struct ethtool_coalesce *c)
|
||||
static int qlge_get_coalesce(struct net_device *dev, struct ethtool_coalesce *c)
|
||||
{
|
||||
struct ql_adapter *qdev = netdev_priv(dev);
|
||||
struct qlge_adapter *qdev = netdev_priv(dev);
|
||||
|
||||
c->rx_coalesce_usecs = qdev->rx_coalesce_usecs;
|
||||
c->tx_coalesce_usecs = qdev->tx_coalesce_usecs;
|
||||
@ -647,14 +647,14 @@ static int ql_get_coalesce(struct net_device *dev, struct ethtool_coalesce *c)
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int ql_set_coalesce(struct net_device *ndev, struct ethtool_coalesce *c)
|
||||
static int qlge_set_coalesce(struct net_device *ndev, struct ethtool_coalesce *c)
|
||||
{
|
||||
struct ql_adapter *qdev = netdev_priv(ndev);
|
||||
struct qlge_adapter *qdev = netdev_priv(ndev);
|
||||
|
||||
/* Validate user parameters. */
|
||||
if (c->rx_coalesce_usecs > qdev->rx_ring_size / 2)
|
||||
return -EINVAL;
|
||||
/* Don't wait more than 10 usec. */
|
||||
/* Don't wait more than 10 usec. */
|
||||
if (c->rx_max_coalesced_frames > MAX_INTER_FRAME_WAIT)
|
||||
return -EINVAL;
|
||||
if (c->tx_coalesce_usecs > qdev->tx_ring_size / 2)
|
||||
@ -674,25 +674,25 @@ static int ql_set_coalesce(struct net_device *ndev, struct ethtool_coalesce *c)
|
||||
qdev->rx_max_coalesced_frames = c->rx_max_coalesced_frames;
|
||||
qdev->tx_max_coalesced_frames = c->tx_max_coalesced_frames;
|
||||
|
||||
return ql_update_ring_coalescing(qdev);
|
||||
return qlge_update_ring_coalescing(qdev);
|
||||
}
|
||||
|
||||
static void ql_get_pauseparam(struct net_device *netdev,
|
||||
struct ethtool_pauseparam *pause)
|
||||
static void qlge_get_pauseparam(struct net_device *netdev,
|
||||
struct ethtool_pauseparam *pause)
|
||||
{
|
||||
struct ql_adapter *qdev = netdev_priv(netdev);
|
||||
struct qlge_adapter *qdev = netdev_priv(netdev);
|
||||
|
||||
ql_mb_get_port_cfg(qdev);
|
||||
qlge_mb_get_port_cfg(qdev);
|
||||
if (qdev->link_config & CFG_PAUSE_STD) {
|
||||
pause->rx_pause = 1;
|
||||
pause->tx_pause = 1;
|
||||
}
|
||||
}
|
||||
|
||||
static int ql_set_pauseparam(struct net_device *netdev,
|
||||
struct ethtool_pauseparam *pause)
|
||||
static int qlge_set_pauseparam(struct net_device *netdev,
|
||||
struct ethtool_pauseparam *pause)
|
||||
{
|
||||
struct ql_adapter *qdev = netdev_priv(netdev);
|
||||
struct qlge_adapter *qdev = netdev_priv(netdev);
|
||||
|
||||
if ((pause->rx_pause) && (pause->tx_pause))
|
||||
qdev->link_config |= CFG_PAUSE_STD;
|
||||
@ -701,19 +701,19 @@ static int ql_set_pauseparam(struct net_device *netdev,
|
||||
else
|
||||
return -EINVAL;
|
||||
|
||||
return ql_mb_set_port_cfg(qdev);
|
||||
return qlge_mb_set_port_cfg(qdev);
|
||||
}
|
||||
|
||||
static u32 ql_get_msglevel(struct net_device *ndev)
|
||||
static u32 qlge_get_msglevel(struct net_device *ndev)
|
||||
{
|
||||
struct ql_adapter *qdev = netdev_priv(ndev);
|
||||
struct qlge_adapter *qdev = netdev_priv(ndev);
|
||||
|
||||
return qdev->msg_enable;
|
||||
}
|
||||
|
||||
static void ql_set_msglevel(struct net_device *ndev, u32 value)
|
||||
static void qlge_set_msglevel(struct net_device *ndev, u32 value)
|
||||
{
|
||||
struct ql_adapter *qdev = netdev_priv(ndev);
|
||||
struct qlge_adapter *qdev = netdev_priv(ndev);
|
||||
|
||||
qdev->msg_enable = value;
|
||||
}
|
||||
@ -721,23 +721,23 @@ static void ql_set_msglevel(struct net_device *ndev, u32 value)
|
||||
const struct ethtool_ops qlge_ethtool_ops = {
|
||||
.supported_coalesce_params = ETHTOOL_COALESCE_USECS |
|
||||
ETHTOOL_COALESCE_MAX_FRAMES,
|
||||
.get_drvinfo = ql_get_drvinfo,
|
||||
.get_wol = ql_get_wol,
|
||||
.set_wol = ql_set_wol,
|
||||
.get_regs_len = ql_get_regs_len,
|
||||
.get_regs = ql_get_regs,
|
||||
.get_msglevel = ql_get_msglevel,
|
||||
.set_msglevel = ql_set_msglevel,
|
||||
.get_drvinfo = qlge_get_drvinfo,
|
||||
.get_wol = qlge_get_wol,
|
||||
.set_wol = qlge_set_wol,
|
||||
.get_regs_len = qlge_get_regs_len,
|
||||
.get_regs = qlge_get_regs,
|
||||
.get_msglevel = qlge_get_msglevel,
|
||||
.set_msglevel = qlge_set_msglevel,
|
||||
.get_link = ethtool_op_get_link,
|
||||
.set_phys_id = ql_set_phys_id,
|
||||
.self_test = ql_self_test,
|
||||
.get_pauseparam = ql_get_pauseparam,
|
||||
.set_pauseparam = ql_set_pauseparam,
|
||||
.get_coalesce = ql_get_coalesce,
|
||||
.set_coalesce = ql_set_coalesce,
|
||||
.get_sset_count = ql_get_sset_count,
|
||||
.get_strings = ql_get_strings,
|
||||
.get_ethtool_stats = ql_get_ethtool_stats,
|
||||
.get_link_ksettings = ql_get_link_ksettings,
|
||||
.set_phys_id = qlge_set_phys_id,
|
||||
.self_test = qlge_self_test,
|
||||
.get_pauseparam = qlge_get_pauseparam,
|
||||
.set_pauseparam = qlge_set_pauseparam,
|
||||
.get_coalesce = qlge_get_coalesce,
|
||||
.set_coalesce = qlge_set_coalesce,
|
||||
.get_sset_count = qlge_get_sset_count,
|
||||
.get_strings = qlge_get_strings,
|
||||
.get_ethtool_stats = qlge_get_ethtool_stats,
|
||||
.get_link_ksettings = qlge_get_link_ksettings,
|
||||
};
|
||||
|
||||
|
||||
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
Loading…
x
Reference in New Issue
Block a user