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PCI: mobiveil: Refactor the MEM/IO outbound window initialization

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Move the resource type check into an if/else block and only
set-up the outbound window for MEM and IO resource. No functional
change intended.

Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Reviewed-by: Minghuan Lian <Minghuan.Lian@nxp.com>
This commit is contained in:
Hou Zhiqiang 2019-07-05 17:56:43 +08:00 committed by Lorenzo Pieralisi
parent 91347af1c5
commit f97441f4c3
1 changed files with 10 additions and 10 deletions
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10
drivers/pci/controller/pcie-mobiveil.c
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@ -565,7 +565,7 @@ static void mobiveil_pcie_enable_msi(struct mobiveil_pcie *pcie)
static int mobiveil_host_init(struct mobiveil_pcie *pcie)
{
u32 value, pab_ctrl, type = 0;
u32 value, pab_ctrl, type;
struct resource_entry *win;
/* setup bus numbers */
@ -617,19 +617,19 @@ static int mobiveil_host_init(struct mobiveil_pcie *pcie)
/* Get the I/O and memory ranges from DT */
resource_list_for_each_entry(win, &pcie->resources) {
type = 0;
if (resource_type(win->res) == IORESOURCE_MEM)
type = MEM_WINDOW_TYPE;
if (resource_type(win->res) == IORESOURCE_IO)
else if (resource_type(win->res) == IORESOURCE_IO)
type = IO_WINDOW_TYPE;
if (type) {
else
continue;
/* configure outbound translation window */
program_ob_windows(pcie, pcie->ob_wins_configured,
win->res->start,
win->res->start - win->offset,
type, resource_size(win->res));
}
}
/* fixup for PCIe class register */
value = csr_readl(pcie, PAB_INTP_AXI_PIO_CLASS);