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kbuild: make *.mod not depend on *.o
The dependency $(obj)/%.mod: $(obj)/%$(mod-prelink-ext).o ... exists because *.mod files previously contained undefined symbols, which are computed from *.o files when CONFIG_TRIM_UNUSED_KSYMS=y. Now that the undefined symbols are put into separate *.usyms files, there is no reason to make *.mod depend on *.o files. Signed-off-by: Masahiro Yamada <masahiroy@kernel.org>
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3
Makefile
3
Makefile
@ -1792,7 +1792,8 @@ ifdef single-build
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# .ko is special because modpost is needed
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single-ko := $(sort $(filter %.ko, $(MAKECMDGOALS)))
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single-no-ko := $(sort $(patsubst %.ko,%.mod, $(MAKECMDGOALS)))
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single-no-ko := $(filter-out $(single-ko), $(MAKECMDGOALS)) \
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$(foreach x, o mod, $(patsubst %.ko, %.$x, $(single-ko)))
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$(single-ko): single_modpost
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@:
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@ -85,7 +85,7 @@ ifdef need-builtin
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targets-for-builtin += $(obj)/built-in.a
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endif
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targets-for-modules := $(foreach x, mod $(if $(CONFIG_TRIM_UNUSED_KSYMS), usyms), \
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targets-for-modules := $(foreach x, o mod $(if $(CONFIG_TRIM_UNUSED_KSYMS), usyms), \
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$(patsubst %.o, %.$x, $(filter %.o, $(obj-m))))
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ifneq ($(CONFIG_LTO_CLANG)$(CONFIG_X86_KERNEL_IBT),)
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@ -306,7 +306,7 @@ endif
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cmd_mod = echo $(addprefix $(obj)/, $(call real-search, $*.o, .o, -objs -y -m)) | \
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$(AWK) -v RS='( |\n)' '!x[$$0]++' > $@
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$(obj)/%.mod: $(obj)/%$(mod-prelink-ext).o FORCE
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$(obj)/%.mod: FORCE
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$(call if_changed,mod)
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# List module undefined symbols
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@ -469,7 +469,6 @@ $(multi-obj-m): FORCE
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$(call if_changed,link_multi-m)
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$(call multi_depend, $(multi-obj-m), .o, -objs -y -m)
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targets += $(multi-obj-m)
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targets := $(filter-out $(PHONY), $(targets))
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# Add intermediate targets:
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