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soc: renesas: rcar-sysc: Remove R-Car H3 ES1.* handling
R-Car H3 ES1.* was only available to an internal development group and needed a lot of quirks and workarounds. These become a maintenance burden now, so our development group decided to remove upstream support and disable booting for this SoC. Public users only have ES2 onwards. Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Reviewed-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/20230307105645.5285-5-wsa+renesas@sang-engineering.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
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@ -38,8 +38,6 @@ static struct rcar_sysc_area r8a7795_areas[] __initdata = {
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{ "a3vp", 0x340, 0, R8A7795_PD_A3VP, R8A7795_PD_ALWAYS_ON },
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{ "cr7", 0x240, 0, R8A7795_PD_CR7, R8A7795_PD_ALWAYS_ON },
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{ "a3vc", 0x380, 0, R8A7795_PD_A3VC, R8A7795_PD_ALWAYS_ON },
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/* A2VC0 exists on ES1.x only */
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{ "a2vc0", 0x3c0, 0, R8A7795_PD_A2VC0, R8A7795_PD_A3VC },
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{ "a2vc1", 0x3c0, 1, R8A7795_PD_A2VC1, R8A7795_PD_A3VC },
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{ "3dg-a", 0x100, 0, R8A7795_PD_3DG_A, R8A7795_PD_ALWAYS_ON },
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{ "3dg-b", 0x100, 1, R8A7795_PD_3DG_B, R8A7795_PD_3DG_A },
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@ -54,14 +52,10 @@ static struct rcar_sysc_area r8a7795_areas[] __initdata = {
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* Fixups for R-Car H3 revisions
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*/
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#define HAS_A2VC0 BIT(0) /* Power domain A2VC0 is present */
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#define NO_EXTMASK BIT(1) /* Missing SYSCEXTMASK register */
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static const struct soc_device_attribute r8a7795_quirks_match[] __initconst = {
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{
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.soc_id = "r8a7795", .revision = "ES1.*",
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.data = (void *)(HAS_A2VC0 | NO_EXTMASK),
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}, {
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.soc_id = "r8a7795", .revision = "ES2.*",
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.data = (void *)(NO_EXTMASK),
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},
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@ -77,10 +71,6 @@ static int __init r8a7795_sysc_init(void)
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if (attr)
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quirks = (uintptr_t)attr->data;
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if (!(quirks & HAS_A2VC0))
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rcar_sysc_nullify(r8a7795_areas, ARRAY_SIZE(r8a7795_areas),
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R8A7795_PD_A2VC0);
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if (quirks & NO_EXTMASK)
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r8a7795_sysc_info.extmask_val = 0;
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@ -30,7 +30,6 @@
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#define R8A7795_PD_CA53_SCU 21
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#define R8A7795_PD_3DG_E 22
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#define R8A7795_PD_A3IR 24
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#define R8A7795_PD_A2VC0 25 /* ES1.x only */
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#define R8A7795_PD_A2VC1 26
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/* Always-on power area */
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