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The CRC-T10DIF algorithm produces a 16-bit CRC, and this is reflected in the folding coefficients, which are also only 16 bits wide. This means that the polynomial multiplications involving these coefficients can be performed using 8-bit long polynomial multiplication (8x8 -> 16) in only a few steps, and this is an instruction that is part of the base NEON ISA, which is all most real ARMv7 cores implement. (The 64-bit PMULL instruction is part of the crypto extensions, which are only implemented by 64-bit cores) The final reduction is a bit more involved, but we can delegate that to the generic CRC-T10DIF implementation after folding the entire input into a 16 byte vector. This results in a speedup of around 6.6x on Cortex-A72 running in 32-bit mode. On Cortex-A8 (BeagleBone White), the results are substantially better than that, but not sufficiently reproducible (with tcrypt) to quote a number here. Signed-off-by: Ard Biesheuvel <ardb@kernel.org> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
125 lines
3.0 KiB
C
125 lines
3.0 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/*
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* Accelerated CRC-T10DIF using ARM NEON and Crypto Extensions instructions
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*
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* Copyright (C) 2016 Linaro Ltd <ard.biesheuvel@linaro.org>
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*/
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#include <linux/crc-t10dif.h>
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#include <linux/init.h>
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/string.h>
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#include <crypto/internal/hash.h>
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#include <crypto/internal/simd.h>
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#include <asm/neon.h>
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#include <asm/simd.h>
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#define CRC_T10DIF_PMULL_CHUNK_SIZE 16U
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asmlinkage u16 crc_t10dif_pmull64(u16 init_crc, const u8 *buf, size_t len);
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asmlinkage void crc_t10dif_pmull8(u16 init_crc, const u8 *buf, size_t len,
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u8 out[16]);
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static int crct10dif_init(struct shash_desc *desc)
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{
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u16 *crc = shash_desc_ctx(desc);
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*crc = 0;
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return 0;
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}
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static int crct10dif_update_ce(struct shash_desc *desc, const u8 *data,
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unsigned int length)
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{
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u16 *crc = shash_desc_ctx(desc);
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if (length >= CRC_T10DIF_PMULL_CHUNK_SIZE && crypto_simd_usable()) {
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kernel_neon_begin();
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*crc = crc_t10dif_pmull64(*crc, data, length);
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kernel_neon_end();
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} else {
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*crc = crc_t10dif_generic(*crc, data, length);
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}
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return 0;
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}
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static int crct10dif_update_neon(struct shash_desc *desc, const u8 *data,
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unsigned int length)
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{
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u16 *crcp = shash_desc_ctx(desc);
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u8 buf[16] __aligned(16);
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u16 crc = *crcp;
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if (length > CRC_T10DIF_PMULL_CHUNK_SIZE && crypto_simd_usable()) {
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kernel_neon_begin();
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crc_t10dif_pmull8(crc, data, length, buf);
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kernel_neon_end();
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crc = 0;
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data = buf;
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length = sizeof(buf);
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}
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*crcp = crc_t10dif_generic(crc, data, length);
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return 0;
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}
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static int crct10dif_final(struct shash_desc *desc, u8 *out)
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{
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u16 *crc = shash_desc_ctx(desc);
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*(u16 *)out = *crc;
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return 0;
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}
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static struct shash_alg algs[] = {{
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.digestsize = CRC_T10DIF_DIGEST_SIZE,
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.init = crct10dif_init,
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.update = crct10dif_update_neon,
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.final = crct10dif_final,
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.descsize = CRC_T10DIF_DIGEST_SIZE,
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.base.cra_name = "crct10dif",
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.base.cra_driver_name = "crct10dif-arm-neon",
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.base.cra_priority = 150,
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.base.cra_blocksize = CRC_T10DIF_BLOCK_SIZE,
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.base.cra_module = THIS_MODULE,
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}, {
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.digestsize = CRC_T10DIF_DIGEST_SIZE,
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.init = crct10dif_init,
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.update = crct10dif_update_ce,
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.final = crct10dif_final,
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.descsize = CRC_T10DIF_DIGEST_SIZE,
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.base.cra_name = "crct10dif",
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.base.cra_driver_name = "crct10dif-arm-ce",
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.base.cra_priority = 200,
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.base.cra_blocksize = CRC_T10DIF_BLOCK_SIZE,
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.base.cra_module = THIS_MODULE,
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}};
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static int __init crc_t10dif_mod_init(void)
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{
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if (!(elf_hwcap & HWCAP_NEON))
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return -ENODEV;
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return crypto_register_shashes(algs, 1 + !!(elf_hwcap2 & HWCAP2_PMULL));
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}
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static void __exit crc_t10dif_mod_exit(void)
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{
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crypto_unregister_shashes(algs, 1 + !!(elf_hwcap2 & HWCAP2_PMULL));
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}
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module_init(crc_t10dif_mod_init);
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module_exit(crc_t10dif_mod_exit);
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MODULE_AUTHOR("Ard Biesheuvel <ard.biesheuvel@linaro.org>");
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MODULE_DESCRIPTION("Accelerated CRC-T10DIF using ARM NEON and Crypto Extensions");
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MODULE_LICENSE("GPL v2");
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MODULE_ALIAS_CRYPTO("crct10dif");
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