mirror of
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
synced 2024-12-29 09:13:38 +00:00
11d894405d
The GXP is the HPE BMC SoC that is used in the majority of current generation HPE servers. Traditionally the asic will last multiple generations of server before being replaced. Info about SoC: HPE GXP is the name of the HPE Soc. This SoC is used to implement many BMC features at HPE. It supports ARMv7 architecture based on the Cortex A9 core. It is capable of using an AXI bus to whicha memory controller is attached. It has multiple SPI interfaces to connect boot flash and BIOS flash. It uses a 10/100/1000 MAC for network connectivity. It has multiple i2c engines to drive connectivity with a host infrastructure. There currently are no public specifications but this process is being worked. Previously there was a requirement to reset the EHCI controller for the asic to boot. This functionality has been moved to the u-boot bootloader. Signed-off-by: Nick Hawkins <nick.hawkins@hpe.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
24 lines
730 B
Plaintext
24 lines
730 B
Plaintext
menuconfig ARCH_HPE
|
|
bool "HPE SoC support"
|
|
depends on ARCH_MULTI_V7
|
|
help
|
|
This enables support for HPE ARM based BMC chips.
|
|
if ARCH_HPE
|
|
|
|
config ARCH_HPE_GXP
|
|
bool "HPE GXP SoC"
|
|
depends on ARCH_MULTI_V7
|
|
select ARM_VIC
|
|
select GENERIC_IRQ_CHIP
|
|
select CLKSRC_MMIO
|
|
help
|
|
HPE GXP is the name of the HPE Soc. This SoC is used to implement many
|
|
BMC features at HPE. It supports ARMv7 architecture based on the Cortex
|
|
A9 core. It is capable of using an AXI bus to which a memory controller
|
|
is attached. It has multiple SPI interfaces to connect boot flash and
|
|
BIOS flash. It uses a 10/100/1000 MAC for network connectivity. It
|
|
has multiple i2c engines to drive connectivity with a host
|
|
infrastructure.
|
|
|
|
endif
|