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https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
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2eeb74c449
ETZPC is a peripheral and memory firewall controller that filter accesses based on Arm TrustZone secure state and Arm CPU privilege execution level. It handles MCU isolation as well. Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
142 lines
3.8 KiB
C
142 lines
3.8 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/*
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* Copyright (C) 2023, STMicroelectronics - All Rights Reserved
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*/
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#include <linux/bitfield.h>
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#include <linux/bits.h>
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#include <linux/device.h>
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#include <linux/err.h>
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#include <linux/init.h>
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#include <linux/io.h>
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/of.h>
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#include <linux/of_platform.h>
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#include <linux/platform_device.h>
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#include <linux/types.h>
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#include "stm32_firewall.h"
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/*
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* ETZPC registers
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*/
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#define ETZPC_DECPROT 0x10
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#define ETZPC_HWCFGR 0x3F0
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/*
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* HWCFGR register
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*/
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#define ETZPC_HWCFGR_NUM_TZMA GENMASK(7, 0)
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#define ETZPC_HWCFGR_NUM_PER_SEC GENMASK(15, 8)
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#define ETZPC_HWCFGR_NUM_AHB_SEC GENMASK(23, 16)
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#define ETZPC_HWCFGR_CHUNKS1N4 GENMASK(31, 24)
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/*
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* ETZPC miscellaneous
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*/
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#define ETZPC_PROT_MASK GENMASK(1, 0)
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#define ETZPC_PROT_A7NS 0x3
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#define ETZPC_DECPROT_SHIFT 1
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#define IDS_PER_DECPROT_REGS 16
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static int stm32_etzpc_grant_access(struct stm32_firewall_controller *ctrl, u32 firewall_id)
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{
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u32 offset, reg_offset, sec_val;
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if (firewall_id >= ctrl->max_entries) {
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dev_err(ctrl->dev, "Invalid sys bus ID %u", firewall_id);
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return -EINVAL;
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}
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/* Check access configuration, 16 peripherals per register */
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reg_offset = ETZPC_DECPROT + 0x4 * (firewall_id / IDS_PER_DECPROT_REGS);
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offset = (firewall_id % IDS_PER_DECPROT_REGS) << ETZPC_DECPROT_SHIFT;
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/* Verify peripheral is non-secure and attributed to cortex A7 */
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sec_val = (readl(ctrl->mmio + reg_offset) >> offset) & ETZPC_PROT_MASK;
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if (sec_val != ETZPC_PROT_A7NS) {
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dev_dbg(ctrl->dev, "Invalid bus configuration: reg_offset %#x, value %d\n",
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reg_offset, sec_val);
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return -EACCES;
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}
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return 0;
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}
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static void stm32_etzpc_release_access(struct stm32_firewall_controller *ctrl __maybe_unused,
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u32 firewall_id __maybe_unused)
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{
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}
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static int stm32_etzpc_probe(struct platform_device *pdev)
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{
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struct stm32_firewall_controller *etzpc_controller;
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struct device_node *np = pdev->dev.of_node;
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u32 nb_per, nb_master;
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struct resource *res;
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void __iomem *mmio;
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int rc;
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etzpc_controller = devm_kzalloc(&pdev->dev, sizeof(*etzpc_controller), GFP_KERNEL);
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if (!etzpc_controller)
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return -ENOMEM;
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mmio = devm_platform_get_and_ioremap_resource(pdev, 0, &res);
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if (IS_ERR(mmio))
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return PTR_ERR(mmio);
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etzpc_controller->dev = &pdev->dev;
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etzpc_controller->mmio = mmio;
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etzpc_controller->name = dev_driver_string(etzpc_controller->dev);
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etzpc_controller->type = STM32_PERIPHERAL_FIREWALL | STM32_MEMORY_FIREWALL;
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etzpc_controller->grant_access = stm32_etzpc_grant_access;
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etzpc_controller->release_access = stm32_etzpc_release_access;
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/* Get number of etzpc entries*/
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nb_per = FIELD_GET(ETZPC_HWCFGR_NUM_PER_SEC,
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readl(etzpc_controller->mmio + ETZPC_HWCFGR));
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nb_master = FIELD_GET(ETZPC_HWCFGR_NUM_AHB_SEC,
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readl(etzpc_controller->mmio + ETZPC_HWCFGR));
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etzpc_controller->max_entries = nb_per + nb_master;
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platform_set_drvdata(pdev, etzpc_controller);
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rc = stm32_firewall_controller_register(etzpc_controller);
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if (rc) {
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dev_err(etzpc_controller->dev, "Couldn't register as a firewall controller: %d",
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rc);
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return rc;
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}
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rc = stm32_firewall_populate_bus(etzpc_controller);
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if (rc) {
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dev_err(etzpc_controller->dev, "Couldn't populate ETZPC bus: %d",
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rc);
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return rc;
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}
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/* Populate all allowed nodes */
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return of_platform_populate(np, NULL, NULL, &pdev->dev);
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}
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static const struct of_device_id stm32_etzpc_of_match[] = {
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{ .compatible = "st,stm32-etzpc" },
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{}
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};
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MODULE_DEVICE_TABLE(of, stm32_etzpc_of_match);
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static struct platform_driver stm32_etzpc_driver = {
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.probe = stm32_etzpc_probe,
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.driver = {
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.name = "stm32-etzpc",
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.of_match_table = stm32_etzpc_of_match,
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},
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};
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module_platform_driver(stm32_etzpc_driver);
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MODULE_AUTHOR("Gatien Chevallier <gatien.chevallier@foss.st.com>");
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MODULE_DESCRIPTION("STMicroelectronics ETZPC driver");
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MODULE_LICENSE("GPL");
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