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a9b5f02394
- Additional cache flushing for secondary CPUs boot mode -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.9 (GNU/Linux) iQIcBAABAgAGBQJR8ojRAAoJEGvWsS0AyF7xoGgP/0kwWr3ND/bsqa6EgF7pVV4K sYU4DgRC2FHlOI0DlW+aRege4ee3NAL9i4GbPV9zOHAEj+Cas4Ytv9MszzhXtdvs I73bigpCsqLIQp68KaLPqjf/WODPBcuK4vZboKF+yTXXe7rq0tBpaSL003ydUxD5 WPgeL92A442hRjgqU3JBm8SERVMaXFYZLY6JwxAmztRliGb+cs3Uh9rSsgiCU9ze eOrRTr8dsR9qY4Iio1vwcl6Id5JSkcZ+WiLs+xdoe10jVfAIvgeJLTizLn1T6eve nVyuhyUR84aElpWtaGpaD2Q5BvFxqt9kun/QgyfGtBShGMN1K3v8avejXY5FXTjT FCq9qU4FzhSp5BAHOUYdgfZcZdU8i68y9HPSIoSvDrttQpHDJNH5kB5vfhKl2PGX POz0KmzTMh1jL4g/LVqmPrGwsKJBpmh/ERifdpwchoKr6UnPVgWG/qbUiQxT4xeY tm5ZxnfWfkpSPcpqWfMdJhv4QU5jeJg5jcigWKF+4Z0uLIXu4h7nPvGjcSN+iYVh zuLEag2aQrxPxYL2OeGjUc1dJ44IacLFjIwRcGmMbj8WXaSGpCoq8PHbGIdt3LEb m7Yo1xAZ85GgR4oqVisAiBma4ZEoE6Gn6o9/crzY8mrS7bV1gv4CGacAfTLH6EyQ cOo0lUnBYOnxEg6ZUpbr =+VTd -----END PGP SIGNATURE----- Merge tag 'arm64-stable' of git://git.kernel.org/pub/scm/linux/kernel/git/cmarinas/linux-aarch64 Pull arm64 fixes from Catalin Marinas: - Stack size increased to 16K (similar to other 64-bit architectures) - Additional cache flushing for secondary CPUs boot mode * tag 'arm64-stable' of git://git.kernel.org/pub/scm/linux/kernel/git/cmarinas/linux-aarch64: arm64: Change kernel stack size to 16K arm64: Fix definition of arm_pm_restart to match the declaration arm64: virt: ensure visibility of __boot_cpu_mode