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2c86e9fb72
The HLCDC IP available on some Atmel SoCs (i.e. at91sam9n12, at91sam9x5 family or sama5d3 family) exposes 2 subdevices: - a display controller (controlled by a DRM driver) - a PWM chip The MFD device provides a regmap and several clocks (those connected to this hardware block) to its subdevices. This way concurrent accesses to the iomem range are handled by the regmap framework, and each subdevice can safely access HLCDC registers. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> Tested-by: Anthony Harivel <anthony.harivel@emtrion.de> Tested-by: Ludovic Desroches <ludovic.desroches@atmel.com> Signed-off-by: Lee Jones <lee.jones@linaro.org> |
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| acpi | ||
| asm-generic | ||
| clocksource | ||
| crypto | ||
| drm | ||
| dt-bindings | ||
| keys | ||
| kvm | ||
| linux | ||
| math-emu | ||
| media | ||
| memory | ||
| misc | ||
| net | ||
| pcmcia | ||
| ras | ||
| rdma | ||
| rxrpc | ||
| scsi | ||
| soc/tegra | ||
| sound | ||
| target | ||
| trace | ||
| uapi | ||
| video | ||
| xen | ||
| Kbuild | ||