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linux/drivers/clk/meson
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Remi Pommarel 3103583954 clk: meson: axg: Remove MIPI enable clock gate 
On AXG platforms HHI_MIPI_CNTL0 is part of the MIPI/PCIe analog PHY
region and is not related to clock one and can be removed from it.

Signed-off-by: Remi Pommarel <repk@triplefau.lt>
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
2021-02-09 13:32:59 +01:00
..
axg-aoclk.c
clk: meson: enable building as modules
2020-11-23 09:08:23 +01:00
axg-aoclk.h
…
axg-audio.c
clk: meson: axg-audio: fix g12a tdmout sclk inverter
2020-08-17 15:58:12 +02:00
axg-audio.h
clk: meson: axg_audio: add sm1 support
2019-10-08 09:29:23 +02:00
axg.c
clk: meson: axg: Remove MIPI enable clock gate
2021-02-09 13:32:59 +01:00
axg.h
clk: meson: axg: Remove MIPI enable clock gate
2021-02-09 13:32:59 +01:00
clk-cpu-dyndiv.c
clk: meson: add g12a cpu dynamic divider driver
2019-08-09 12:10:03 +02:00
clk-cpu-dyndiv.h
clk: meson: add g12a cpu dynamic divider driver
2019-08-09 12:10:03 +02:00
clk-dualdiv.c
…
clk-dualdiv.h
…
clk-mpll.c
clk: let init callback return an error code
2019-12-23 18:53:13 -08:00
clk-mpll.h
…
clk-phase.c
clk: meson: add sclk-ws driver
2020-08-17 15:58:02 +02:00
clk-phase.h
clk: meson: add sclk-ws driver
2020-08-17 15:58:02 +02:00
clk-pll.c
clk: meson: clk-pll: propagate the error from meson_clk_pll_set_rate()
2021-01-04 11:42:43 +01:00
clk-pll.h
…
clk-regmap.c
…
clk-regmap.h
clk: define to_clk_regmap() as inline function
2020-10-28 16:34:44 -07:00
g12a-aoclk.c
clk: meson: enable building as modules
2020-11-23 09:08:23 +01:00
g12a-aoclk.h
…
g12a.c
clk: meson: g12a: add MIPI DSI Host Pixel Clock
2020-11-26 15:25:20 +01:00
g12a.h
clk: meson: g12a: add MIPI DSI Host Pixel Clock
2020-11-26 15:25:20 +01:00
gxbb-aoclk.c
clk: meson: enable building as modules
2020-11-23 09:08:23 +01:00
gxbb-aoclk.h
…
gxbb.c
clk: meson: enable building as modules
2020-11-23 09:08:23 +01:00
gxbb.h
clk: meson: gxbb: add the gxl internal dac gate
2020-02-13 17:26:04 +01:00
Kconfig
clk: meson: enable building as modules
2020-11-23 09:08:23 +01:00
Makefile
clk: meson: add a driver for the Meson8/8b/8m2 DDR clock controller
2019-12-11 14:06:29 +01:00
meson8-ddr.c
clk: meson: add a driver for the Meson8/8b/8m2 DDR clock controller
2019-12-11 14:06:29 +01:00
meson8b.c
clk: meson: meson8b: remove compatibility code for old .dtbs
2021-01-04 11:43:19 +01:00
meson8b.h
Merge branch 'clk-amlogic' into clk-next
2020-07-21 01:01:11 -07:00
meson-aoclk.c
clk: meson: enable building as modules
2020-11-23 09:08:23 +01:00
meson-aoclk.h
clk: meson: remove ao input bypass clocks
2019-07-29 12:42:48 +02:00
meson-eeclk.c
clk: meson: enable building as modules
2020-11-23 09:08:23 +01:00
meson-eeclk.h
clk: meson: remove ee input bypass clocks
2019-07-29 12:42:49 +02:00
parm.h
…
sclk-div.c
clk: let init callback return an error code
2019-12-23 18:53:13 -08:00
sclk-div.h
…
vid-pll-div.c
…
vid-pll-div.h
…