Len Brown 32e9518005 intel_idle: export both C1 and C1E
Here we disable HW promotion of C1 to C1E
and export both C1 and C1E and distinct C-states.

This allows a cpuidle governor to choose a lower latency
C-state than C1E when necessary to satisfy performance
and QOS constraints -- and still save power versus polling.
This also corrects the erroneous latency previously reported
for C1E -- it is 10usec, not 1usec.

Note that if you use "intel_idle.max_cstate=N",
then you must increment N by 1 to get the same behavior
after this change.

Signed-off-by: Len Brown <len.brown@intel.com>
2013-02-13 18:22:08 -05:00
..
2013-01-23 20:30:52 -08:00
2013-01-30 11:38:25 +01:00
2013-02-13 18:22:08 -05:00
2013-01-14 09:08:38 -08:00
2012-12-11 14:08:47 -08:00
2012-12-18 15:19:06 +10:30
2013-01-28 00:18:04 -05:00
2013-01-22 16:36:23 -08:00
2012-12-12 11:45:16 -08:00
2013-01-08 18:53:56 -08:00
2012-12-19 08:19:07 -08:00
2012-12-11 13:13:55 -08:00
2013-01-16 15:57:54 +01:00
2013-01-18 14:05:25 -08:00
2012-12-12 12:05:15 -08:00
2013-01-15 10:45:26 -07:00
2013-01-18 12:02:52 -08:00
2012-11-16 08:14:18 -08:00
2012-11-16 08:14:18 -08:00