linux/arch/mips/include
Jiaxun Yang 580724fce2 MIPS: sync-r4k: Rework based on x86 tsc_sync
The original sync-r4k did a good job on reducing jitter by determine
the "next time value", but it has a limitation that when synchronization
being performed too many times due to high core count or CPU hotplug,
the timewrap on CPU0 will become unaccpetable.

Rework the mechanism based on latest x86 tsc_sync. (It seems like
the original implementation is based on tsc_sync at that time,
so it's just a refresh.) To improve overall performance.

Tesed on Loongson64, Boston, QEMU.

Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2024-07-03 16:50:12 +02:00
..
asm MIPS: sync-r4k: Rework based on x86 tsc_sync 2024-07-03 16:50:12 +02:00
uapi/asm kvm: replace __KVM_HAVE_READONLY_MEM with Kconfig symbol 2024-02-08 08:41:06 -05:00