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linux/drivers/clk/mediatek
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Chun-Jie Chen 7cc4e1bbe3 clk: mediatek: Fix asymmetrical PLL enable and disable control 
In fact, the en_mask is a combination of divider enable mask
and pll enable bit(bit0).
Before this patch, we enabled both divider mask and bit0 in prepare(),
but only cleared the bit0 in unprepare().
In the future, we hope en_mask will only be used as divider enable mask.
The enable register(CON0) will be set in 2 steps:
first is divider mask, and then bit0 during prepare(), and vice versa.
But considering backward compatibility, at this stage we allow en_mask
to be a combination or a pure divider enable mask.
And then we will make en_mask a pure divider enable mask in another
following patch series.

Reviewed-by: Ikjoon Jang <ikjn@chromium.org>
Signed-off-by: Weiyi Lu <weiyi.lu@mediatek.com>
Signed-off-by: Chun-Jie Chen <chun-jie.chen@mediatek.com>
Link: https://lore.kernel.org/r/20210726105719.15793-7-chun-jie.chen@mediatek.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2021-07-27 10:53:06 -07:00
..
clk-apmixed.c
treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 174
2019-05-30 11:26:41 -07:00
clk-cpumux.c
clk: mediatek: Get regmap without syscon compatible check
2021-07-27 10:53:06 -07:00
clk-cpumux.h
treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 174
2019-05-30 11:26:41 -07:00
clk-gate.c
clk: mediatek: Register clock gate with device
2019-09-17 10:22:49 -07:00
clk-gate.h
clk: mediatek: Register clock gate with device
2019-09-17 10:22:49 -07:00
clk-mt2701-aud.c
clk: mediatek: add audsys support for MT2701
2018-03-20 00:24:42 -07:00
clk-mt2701-bdp.c
treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 174
2019-05-30 11:26:41 -07:00
clk-mt2701-eth.c
treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 174
2019-05-30 11:26:41 -07:00
clk-mt2701-g3d.c
clk: mediatek: add g3dsys support for MT2701 and MT7623
2018-05-15 15:21:36 -07:00
clk-mt2701-hif.c
treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 174
2019-05-30 11:26:41 -07:00
clk-mt2701-img.c
treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 174
2019-05-30 11:26:41 -07:00
clk-mt2701-mm.c
clk / soc: mediatek: Bind clock and gpu driver for mt2701
2020-05-20 12:47:02 +02:00
clk-mt2701-vdec.c
treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 174
2019-05-30 11:26:41 -07:00
clk-mt2701.c
treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 174
2019-05-30 11:26:41 -07:00
clk-mt2712-bdp.c
treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 174
2019-05-30 11:26:41 -07:00
clk-mt2712-img.c
treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 174
2019-05-30 11:26:41 -07:00
clk-mt2712-jpgdec.c
treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 174
2019-05-30 11:26:41 -07:00
clk-mt2712-mfg.c
treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 174
2019-05-30 11:26:41 -07:00
clk-mt2712-mm.c
clk / soc: mediatek: Bind clock and gpu driver for mt2712
2020-05-20 12:47:02 +02:00
clk-mt2712-vdec.c
treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 174
2019-05-30 11:26:41 -07:00
clk-mt2712-venc.c
treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 174
2019-05-30 11:26:41 -07:00
clk-mt2712.c
clk: mediatek: mt2712: use devm_platform_ioremap_resource() to simplify code
2019-10-16 16:17:32 -07:00
clk-mt6765-audio.c
clk: mediatek: Add MT6765 clock support
2020-05-28 21:23:18 -07:00
clk-mt6765-cam.c
clk: mediatek: Add MT6765 clock support
2020-05-28 21:23:18 -07:00
clk-mt6765-img.c
clk: mediatek: Add MT6765 clock support
2020-05-28 21:23:18 -07:00
clk-mt6765-mipi0a.c
clk: mediatek: Add MT6765 clock support
2020-05-28 21:23:18 -07:00
clk-mt6765-mm.c
clk: mediatek: Add MT6765 clock support
2020-05-28 21:23:18 -07:00
clk-mt6765-vcodec.c
clk: mediatek: Add MT6765 clock support
2020-05-28 21:23:18 -07:00
clk-mt6765.c
clk: mediatek: fix platform_no_drv_owner.cocci warnings
2020-09-22 12:56:59 -07:00
clk-mt6779-aud.c
clk: mediatek: Add MT6779 clock support
2019-09-09 09:37:30 -07:00
clk-mt6779-cam.c
clk: mediatek: Add MT6779 clock support
2019-09-09 09:37:30 -07:00
clk-mt6779-img.c
clk: mediatek: Add MT6779 clock support
2019-09-09 09:37:30 -07:00
clk-mt6779-ipe.c
clk: mediatek: Add MT6779 clock support
2019-09-09 09:37:30 -07:00
clk-mt6779-mfg.c
clk: mediatek: Add MT6779 clock support
2019-09-09 09:37:30 -07:00
clk-mt6779-mm.c
clk/soc: mediatek: mt6779: Bind clock driver from platform device
2020-05-20 12:49:35 +02:00
clk-mt6779-vdec.c
clk: mediatek: Add MT6779 clock support
2019-09-09 09:37:30 -07:00
clk-mt6779-venc.c
clk: mediatek: Add MT6779 clock support
2019-09-09 09:37:30 -07:00
clk-mt6779.c
clk: mediatek: add UART0 clock support
2020-10-08 14:45:16 -07:00
clk-mt6797-img.c
treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 174
2019-05-30 11:26:41 -07:00
clk-mt6797-mm.c
clk/soc: mediatek: mt6797: Bind clock driver from platform device
2020-05-20 12:49:35 +02:00
clk-mt6797-vdec.c
treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 174
2019-05-30 11:26:41 -07:00
clk-mt6797-venc.c
treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 174
2019-05-30 11:26:41 -07:00
clk-mt6797.c
clk: mediatek: mt6797: simplify the return expression of mtk_infrasys_init
2020-09-22 12:56:26 -07:00
clk-mt7622-aud.c
treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 174
2019-05-30 11:26:41 -07:00
clk-mt7622-eth.c
treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 174
2019-05-30 11:26:41 -07:00
clk-mt7622-hif.c
treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 174
2019-05-30 11:26:41 -07:00
clk-mt7622.c
clk: mediatek: mt7622: use devm_platform_ioremap_resource() to simplify code
2019-10-16 16:17:42 -07:00
clk-mt7629-eth.c
clk: mediatek: add clock support for MT7629 SoC
2018-11-29 22:52:05 -08:00
clk-mt7629-hif.c
clk: mediatek: add clock support for MT7629 SoC
2018-11-29 22:52:05 -08:00
clk-mt7629.c
clk: mediatek: mt7629: simplify the return expression of mtk_infrasys_init
2020-09-22 12:56:37 -07:00
clk-mt8135.c
treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 174
2019-05-30 11:26:41 -07:00
clk-mt8167-aud.c
clk: mediatek: Add MT8167 clock support
2020-10-13 15:46:01 -07:00
clk-mt8167-img.c
clk: mediatek: Add MT8167 clock support
2020-10-13 15:46:01 -07:00
clk-mt8167-mfgcfg.c
clk: mediatek: Add MT8167 clock support
2020-10-13 15:46:01 -07:00
clk-mt8167-mm.c
clk: mediatek: Add MT8167 clock support
2020-10-13 15:46:01 -07:00
clk-mt8167-vdec.c
clk: mediatek: Add MT8167 clock support
2020-10-13 15:46:01 -07:00
clk-mt8167.c
clk: mediatek: Add MT8167 clock support
2020-10-13 15:46:01 -07:00
clk-mt8173-mm.c
clk / soc: mediatek: Move mt8173 MMSYS to platform driver
2020-04-13 13:01:16 +02:00
clk-mt8173.c
clk / soc: mediatek: Move mt8173 MMSYS to platform driver
2020-04-13 13:01:16 +02:00
clk-mt8183-audio.c
clk: mediatek: Add MT8183 clock support
2019-04-11 13:29:19 -07:00
clk-mt8183-cam.c
clk: mediatek: Add MT8183 clock support
2019-04-11 13:29:19 -07:00
clk-mt8183-img.c
clk: mediatek: Add MT8183 clock support
2019-04-11 13:29:19 -07:00
clk-mt8183-ipu0.c
clk: mediatek: Add MT8183 clock support
2019-04-11 13:29:19 -07:00
clk-mt8183-ipu1.c
clk: mediatek: Add MT8183 clock support
2019-04-11 13:29:19 -07:00
clk-mt8183-ipu_adl.c
clk: mediatek: Add MT8183 clock support
2019-04-11 13:29:19 -07:00
clk-mt8183-ipu_conn.c
clk: mediatek: Add MT8183 clock support
2019-04-11 13:29:19 -07:00
clk-mt8183-mfgcfg.c
clk: mediatek: Runtime PM support for MT8183 mcucfg clock provider
2019-09-17 10:22:49 -07:00
clk-mt8183-mm.c
clk/soc: mediatek: mt8183: Bind clock driver from platform device
2020-05-20 12:49:35 +02:00
clk-mt8183-vdec.c
clk: mediatek: Add MT8183 clock support
2019-04-11 13:29:19 -07:00
clk-mt8183-venc.c
clk: mediatek: Add MT8183 clock support
2019-04-11 13:29:19 -07:00
clk-mt8183.c
clk: mediatek: mt8183: use devm_platform_ioremap_resource() to simplify code
2019-10-16 16:17:40 -07:00
clk-mt8516-aud.c
clk: mediatek: add audsys clock driver for MT8516
2019-06-06 15:56:18 -07:00
clk-mt8516.c
clk: mediatek: mt8516: Remove unused variable
2019-06-07 11:54:47 -07:00
clk-mtk.c
clk: mediatek: Get regmap without syscon compatible check
2021-07-27 10:53:06 -07:00
clk-mtk.h
clk: mediatek: Register clock gate with device
2019-09-17 10:22:49 -07:00
clk-mux.c
clk: mediatek: Get regmap without syscon compatible check
2021-07-27 10:53:06 -07:00
clk-mux.h
clk: mediatek: mux: Update parent at enable time
2021-02-09 00:01:28 -08:00
clk-pll.c
clk: mediatek: Fix asymmetrical PLL enable and disable control
2021-07-27 10:53:06 -07:00
Kconfig
clk: mediatek: Select all the MT8183 clocks by default
2021-02-08 23:47:04 -08:00
Makefile
clk: mediatek: Add MT8167 clock support
2020-10-13 15:46:01 -07:00
reset.c
clk: mediatek: Get regmap without syscon compatible check
2021-07-27 10:53:06 -07:00