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20498d52c9
Commit e4c23e19aa2a ("clk: mediatek: Register clock gate with device")
introduces a helper function for the sole purpose of propagating a
struct device pointer to the clk API when registering the mtk-gate
clocks to take advantage of Runtime PM when/where needed and where
a power domain is defined in devicetree.
Function mtk_clk_register_gates() then becomes a wrapper around the
new mtk_clk_register_gates_with_dev() function that will simply pass
NULL as struct device: this is essential when registering drivers
with CLK_OF_DECLARE instead of as a platform device, as there will
be no struct device to pass... but we can as well simply have only
one function that always takes such pointer as a param and pass NULL
when unavoidable.
This commit removes the mtk_clk_register_gates() wrapper and renames
mtk_clk_register_gates_with_dev() to the former and all of the calls
to either of the two functions were fixed in all drivers in order to
reflect this change; also, to improve consistency with other kernel
functions, the pointer to struct device was moved as the first param.
Since a lot of MediaTek clock drivers are actually registering as a
platform device, but were still registering the mtk-gate clocks
without passing any struct device to the clock framework, they've
been changed to pass a valid one now, as to make all those platforms
able to use runtime power management where available.
While at it, some much needed indentation changes were also done.
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Reviewed-by: Chen-Yu Tsai <wenst@chromium.org>
Reviewed-by: Markus Schneider-Pargmann <msp@baylibre.com>
Tested-by: Miles Chen <miles.chen@mediatek.com>
Link: https://lore.kernel.org/r/20230120092053.182923-4-angelogioacchino.delregno@collabora.com
Tested-by: Mingming Su <mingming.su@mediatek.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
83 lines
2.1 KiB
C
83 lines
2.1 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/*
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* Copyright (c) 2014 MediaTek Inc.
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* Author: Shunli Wang <shunli.wang@mediatek.com>
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*/
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#include <linux/clk-provider.h>
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#include <linux/platform_device.h>
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#include "clk-mtk.h"
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#include "clk-gate.h"
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#include <dt-bindings/clock/mt2701-clk.h>
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static const struct mtk_gate_regs eth_cg_regs = {
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.sta_ofs = 0x0030,
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};
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#define GATE_ETH(_id, _name, _parent, _shift) { \
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.id = _id, \
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.name = _name, \
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.parent_name = _parent, \
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.regs = ð_cg_regs, \
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.shift = _shift, \
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.ops = &mtk_clk_gate_ops_no_setclr_inv, \
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}
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static const struct mtk_gate eth_clks[] = {
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GATE_ETH(CLK_ETHSYS_HSDMA, "hsdma_clk", "ethif_sel", 5),
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GATE_ETH(CLK_ETHSYS_ESW, "esw_clk", "ethpll_500m_ck", 6),
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GATE_ETH(CLK_ETHSYS_GP2, "gp2_clk", "trgpll", 7),
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GATE_ETH(CLK_ETHSYS_GP1, "gp1_clk", "ethpll_500m_ck", 8),
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GATE_ETH(CLK_ETHSYS_PCM, "pcm_clk", "ethif_sel", 11),
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GATE_ETH(CLK_ETHSYS_GDMA, "gdma_clk", "ethif_sel", 14),
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GATE_ETH(CLK_ETHSYS_I2S, "i2s_clk", "ethif_sel", 17),
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GATE_ETH(CLK_ETHSYS_CRYPTO, "crypto_clk", "ethif_sel", 29),
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};
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static u16 rst_ofs[] = { 0x34, };
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static const struct mtk_clk_rst_desc clk_rst_desc = {
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.version = MTK_RST_SIMPLE,
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.rst_bank_ofs = rst_ofs,
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.rst_bank_nr = ARRAY_SIZE(rst_ofs),
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};
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static const struct of_device_id of_match_clk_mt2701_eth[] = {
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{ .compatible = "mediatek,mt2701-ethsys", },
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{}
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};
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static int clk_mt2701_eth_probe(struct platform_device *pdev)
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{
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struct clk_hw_onecell_data *clk_data;
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int r;
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struct device_node *node = pdev->dev.of_node;
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clk_data = mtk_alloc_clk_data(CLK_ETHSYS_NR);
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mtk_clk_register_gates(&pdev->dev, node, eth_clks,
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ARRAY_SIZE(eth_clks), clk_data);
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r = of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data);
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if (r)
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dev_err(&pdev->dev,
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"could not register clock provider: %s: %d\n",
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pdev->name, r);
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mtk_register_reset_controller_with_dev(&pdev->dev, &clk_rst_desc);
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return r;
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}
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static struct platform_driver clk_mt2701_eth_drv = {
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.probe = clk_mt2701_eth_probe,
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.driver = {
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.name = "clk-mt2701-eth",
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.of_match_table = of_match_clk_mt2701_eth,
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},
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};
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builtin_platform_driver(clk_mt2701_eth_drv);
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