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f42058b037
Define a set of register numbers with their symbolic names to help with uasm code. All names are prefixed by GPR_ to prevent naming clash. Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
198 lines
4.9 KiB
C
198 lines
4.9 KiB
C
/*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*
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* Copyright (C) 1985 MIPS Computer Systems, Inc.
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* Copyright (C) 1994, 95, 99, 2003 by Ralf Baechle
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* Copyright (C) 1990 - 1992, 1999 Silicon Graphics, Inc.
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* Copyright (C) 2011 Wind River Systems,
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* written by Ralf Baechle <ralf@linux-mips.org>
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*/
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#ifndef _ASM_REGDEF_H
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#define _ASM_REGDEF_H
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#include <asm/sgidefs.h>
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#if _MIPS_SIM == _MIPS_SIM_ABI32
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/*
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* General purpose register numbers for 32 bit ABI
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*/
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#define GPR_ZERO 0 /* wired zero */
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#define GPR_AT 1 /* assembler temp */
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#define GPR_V0 2 /* return value */
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#define GPR_V1 3
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#define GPR_A0 4 /* argument registers */
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#define GPR_A1 5
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#define GPR_A2 6
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#define GPR_A3 7
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#define GPR_T0 8 /* caller saved */
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#define GPR_T1 9
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#define GPR_T2 10
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#define GPR_T3 11
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#define GPR_T4 12
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#define GPR_TA0 12
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#define GPR_T5 13
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#define GPR_TA1 13
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#define GPR_T6 14
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#define GPR_TA2 14
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#define GPR_T7 15
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#define GPR_TA3 15
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#define GPR_S0 16 /* callee saved */
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#define GPR_S1 17
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#define GPR_S2 18
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#define GPR_S3 19
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#define GPR_S4 20
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#define GPR_S5 21
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#define GPR_S6 22
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#define GPR_S7 23
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#define GPR_T8 24 /* caller saved */
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#define GPR_T9 25
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#define GPR_JP 25 /* PIC jump register */
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#define GPR_K0 26 /* kernel scratch */
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#define GPR_K1 27
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#define GPR_GP 28 /* global pointer */
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#define GPR_SP 29 /* stack pointer */
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#define GPR_FP 30 /* frame pointer */
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#define GPR_S8 30 /* same like fp! */
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#define GPR_RA 31 /* return address */
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#endif /* _MIPS_SIM == _MIPS_SIM_ABI32 */
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#if _MIPS_SIM == _MIPS_SIM_ABI64 || _MIPS_SIM == _MIPS_SIM_NABI32
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#define GPR_ZERO 0 /* wired zero */
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#define GPR_AT 1 /* assembler temp */
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#define GPR_V0 2 /* return value - caller saved */
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#define GPR_V1 3
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#define GPR_A0 4 /* argument registers */
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#define GPR_A1 5
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#define GPR_A2 6
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#define GPR_A3 7
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#define GPR_A4 8 /* arg reg 64 bit; caller saved in 32 bit */
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#define GPR_TA0 8
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#define GPR_A5 9
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#define GPR_TA1 9
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#define GPR_A6 10
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#define GPR_TA2 10
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#define GPR_A7 11
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#define GPR_TA3 11
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#define GPR_T0 12 /* caller saved */
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#define GPR_T1 13
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#define GPR_T2 14
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#define GPR_T3 15
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#define GPR_S0 16 /* callee saved */
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#define GPR_S1 17
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#define GPR_S2 18
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#define GPR_S3 19
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#define GPR_S4 20
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#define GPR_S5 21
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#define GPR_S6 22
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#define GPR_S7 23
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#define GPR_T8 24 /* caller saved */
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#define GPR_T9 25 /* callee address for PIC/temp */
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#define GPR_JP 25 /* PIC jump register */
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#define GPR_K0 26 /* kernel temporary */
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#define GPR_K1 27
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#define GPR_GP 28 /* global pointer - caller saved for PIC */
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#define GPR_SP 29 /* stack pointer */
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#define GPR_FP 30 /* frame pointer */
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#define GPR_S8 30 /* callee saved */
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#define GPR_RA 31 /* return address */
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#endif /* _MIPS_SIM == _MIPS_SIM_ABI64 || _MIPS_SIM == _MIPS_SIM_NABI32 */
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#ifdef __ASSEMBLY__
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#if _MIPS_SIM == _MIPS_SIM_ABI32
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/*
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* Symbolic register names for 32 bit ABI
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*/
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#define zero $0 /* wired zero */
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#define AT $1 /* assembler temp - uppercase because of ".set at" */
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#define v0 $2 /* return value */
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#define v1 $3
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#define a0 $4 /* argument registers */
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#define a1 $5
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#define a2 $6
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#define a3 $7
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#define t0 $8 /* caller saved */
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#define t1 $9
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#define t2 $10
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#define t3 $11
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#define t4 $12
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#define ta0 $12
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#define t5 $13
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#define ta1 $13
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#define t6 $14
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#define ta2 $14
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#define t7 $15
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#define ta3 $15
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#define s0 $16 /* callee saved */
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#define s1 $17
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#define s2 $18
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#define s3 $19
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#define s4 $20
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#define s5 $21
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#define s6 $22
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#define s7 $23
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#define t8 $24 /* caller saved */
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#define t9 $25
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#define jp $25 /* PIC jump register */
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#define k0 $26 /* kernel scratch */
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#define k1 $27
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#define gp $28 /* global pointer */
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#define sp $29 /* stack pointer */
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#define fp $30 /* frame pointer */
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#define s8 $30 /* same like fp! */
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#define ra $31 /* return address */
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#endif /* _MIPS_SIM == _MIPS_SIM_ABI32 */
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#if _MIPS_SIM == _MIPS_SIM_ABI64 || _MIPS_SIM == _MIPS_SIM_NABI32
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#define zero $0 /* wired zero */
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#define AT $at /* assembler temp - uppercase because of ".set at" */
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#define v0 $2 /* return value - caller saved */
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#define v1 $3
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#define a0 $4 /* argument registers */
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#define a1 $5
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#define a2 $6
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#define a3 $7
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#define a4 $8 /* arg reg 64 bit; caller saved in 32 bit */
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#define ta0 $8
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#define a5 $9
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#define ta1 $9
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#define a6 $10
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#define ta2 $10
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#define a7 $11
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#define ta3 $11
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#define t0 $12 /* caller saved */
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#define t1 $13
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#define t2 $14
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#define t3 $15
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#define s0 $16 /* callee saved */
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#define s1 $17
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#define s2 $18
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#define s3 $19
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#define s4 $20
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#define s5 $21
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#define s6 $22
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#define s7 $23
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#define t8 $24 /* caller saved */
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#define t9 $25 /* callee address for PIC/temp */
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#define jp $25 /* PIC jump register */
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#define k0 $26 /* kernel temporary */
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#define k1 $27
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#define gp $28 /* global pointer - caller saved for PIC */
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#define sp $29 /* stack pointer */
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#define fp $30 /* frame pointer */
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#define s8 $30 /* callee saved */
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#define ra $31 /* return address */
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#endif /* _MIPS_SIM == _MIPS_SIM_ABI64 || _MIPS_SIM == _MIPS_SIM_NABI32 */
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#endif /* __ASSEMBLY__ */
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#endif /* _ASM_REGDEF_H */
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