linux/arch/openrisc
Stafford Horne c28b27416d openrisc: Implement proper SMP tlb flushing
Up until now when flushing pages from the TLB on SMP OpenRISC was always
resorting to flush the entire TLB on all CPUs.  This patch adds the
mechanics for flushing specific ranges and pages based on the usage.

The function switch_mm is updated to account for cpu usage by updating
mm_struct's cpumask.  This is used in the SMP flush routines.

This mostly follows the riscv implementation.

Signed-off-by: Stafford Horne <shorne@gmail.com>
2020-08-04 10:59:45 +09:00
..
boot/dts or1k: dts: Add ethoc device to SMP devicetree 2019-08-31 11:56:19 +09:00
configs openrisc: configs: Cleanup CONFIG_CROSS_COMPILE 2020-01-31 22:10:58 +09:00
include openrisc: fix __user in raw_copy_to_user()'s prototype 2020-08-04 10:59:45 +09:00
kernel openrisc: Implement proper SMP tlb flushing 2020-08-04 10:59:45 +09:00
lib treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 500 2019-06-19 17:09:55 +02:00
mm openrisc: Implement proper SMP tlb flushing 2020-08-04 10:59:45 +09:00
Kconfig OpenRISC updates for 5.6 2020-04-07 12:33:37 -07:00
Kconfig.debug treewide: Add SPDX license identifier - Makefile/Kconfig 2019-05-21 10:50:46 +02:00
Makefile openrisc: remove unneeded code in arch/openrisc/Makefile 2019-01-17 23:42:59 +09:00