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d2f4a190b1
None of the supported SH4 family SoCs features a second DMAC module. As this definition negatively impacts DMA channel calculation for the above targets, remove it from the code. Signed-off-by: Artur Rojek <contact@artur-rojek.eu> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: John Paul Adrian Glaubitz <glaubitz@physik.fu-berlin.de> Link: https://lore.kernel.org/r/20230527164452.64797-3-contact@artur-rojek.eu Signed-off-by: John Paul Adrian Glaubitz <glaubitz@physik.fu-berlin.de>
18 lines
355 B
C
18 lines
355 B
C
/* SPDX-License-Identifier: GPL-2.0 */
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#ifndef __ASM_CPU_SH4_DMA_H
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#define __ASM_CPU_SH4_DMA_H
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#include <linux/sh_intc.h>
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/*
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* SH7750/SH7751/SH7760
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*/
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#define DMTE0_IRQ evt2irq(0x640)
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#define DMTE4_IRQ evt2irq(0x780)
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#define DMTE6_IRQ evt2irq(0x7c0)
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#define DMAE0_IRQ evt2irq(0x6c0)
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#define SH_DMAC_BASE0 0xffa00000
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#endif /* __ASM_CPU_SH4_DMA_H */
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