linux/drivers/cxl
Li Zhijian cce3cd6477 cxl/core: Return error when cxl_endpoint_gather_bandwidth() handles a non-PCI device
The function cxl_endpoint_gather_bandwidth() invokes
pci_bus_read/write_XXX(), however, not all CXL devices are presently
implemented via PCI. It is recognized that the cxl_test has realized a CXL
device using a platform device.

Calling pci_bus_read/write_XXX() in cxl_test will cause kernel panic:
 platform cxl_host_bridge.3: host supports CXL (restricted)
 Oops: general protection fault, probably for non-canonical address 0x3ef17856fcae4fbd: 0000 [#1] PREEMPT SMP PTI
 Call Trace:
  <TASK>
  ? __die_body.cold+0x19/0x27
  ? die_addr+0x38/0x60
  ? exc_general_protection+0x1f5/0x4b0
  ? asm_exc_general_protection+0x22/0x30
  ? pci_bus_read_config_word+0x1c/0x60
  pcie_capability_read_word+0x93/0xb0
  pcie_link_speed_mbps+0x18/0x50
  cxl_pci_get_bandwidth+0x18/0x60 [cxl_core]
  cxl_endpoint_gather_bandwidth.constprop.0+0xf4/0x230 [cxl_core]
  ? xas_store+0x54/0x660
  ? preempt_count_add+0x69/0xa0
  ? _raw_spin_lock+0x13/0x40
  ? __kmalloc_cache_noprof+0xe7/0x270
  cxl_region_shared_upstream_bandwidth_update+0x9c/0x790 [cxl_core]
  cxl_region_attach+0x520/0x7e0 [cxl_core]
  store_targetN+0xf2/0x120 [cxl_core]
  kernfs_fop_write_iter+0x13a/0x1f0
  vfs_write+0x23b/0x410
  ksys_write+0x53/0xd0
  do_syscall_64+0x62/0x180
  entry_SYSCALL_64_after_hwframe+0x76/0x7e

And Ying also reported a KASAN error with similar calltrace.

Reported-by: Huang, Ying <ying.huang@intel.com>
Closes: http://lore.kernel.org/87y12w9vp5.fsf@yhuang6-desk2.ccr.corp.intel.com
Fixes: a5ab0de0eb ("cxl: Calculate region bandwidth of targets with shared upstream link")
Signed-off-by: Li Zhijian <lizhijian@fujitsu.com>
Reviewed-by: Dan Williams <dan.j.williams@intel.com>
Tested-by: Huang, Ying <ying.huang@intel.com>
Link: https://patch.msgid.link/20241022030054.258942-1-lizhijian@fujitsu.com
Signed-off-by: Ira Weiny <ira.weiny@intel.com>
2024-10-24 16:05:52 -05:00
..
core cxl/core: Return error when cxl_endpoint_gather_bandwidth() handles a non-PCI device 2024-10-24 16:05:52 -05:00
acpi.c Merge branch 'for-6.11/xor_fixes' into cxl-for-next 2024-07-11 16:47:47 -07:00
cxl.h cxl: Calculate region bandwidth of targets with shared upstream link 2024-09-22 21:05:16 -07:00
cxlmem.h cxl: Preserve the CDAT access_coordinate for an endpoint 2024-09-22 21:02:53 -07:00
cxlpci.h PCI/CXL: Move CXL Vendor ID to pci_ids.h 2024-05-08 13:18:33 -05:00
Kconfig mm: make range-to-target_node lookup facility a part of numa_memblks 2024-09-03 21:15:32 -07:00
Makefile cxl/pmem: Introduce nvdimm_security_ops with ->get_flags() operation 2022-11-30 16:30:47 -08:00
mem.c cxl/pci: Rename cxl_setup_parent_dport() and cxl_dport_map_regs() 2024-09-03 15:29:33 -07:00
pci.c move asm/unaligned.h to linux/unaligned.h 2024-10-02 17:23:23 -04:00
pmem.c move asm/unaligned.h to linux/unaligned.h 2024-10-02 17:23:23 -04:00
pmu.h cxl/pci: Find and register CXL PMU devices 2023-05-30 11:20:35 -07:00
port.c cxl/pci: Remove duplicated implementation of waiting for memory_info_valid 2024-09-09 11:33:44 -07:00
security.c move asm/unaligned.h to linux/unaligned.h 2024-10-02 17:23:23 -04:00