Linus Walleij f5ff9a115e clk: ux500: fix erroneous bit assignment ...

Due to a typo or similar, the peripheral group 2 clock 11
gate was set to bit 1 instead of bit 11. We need to fix this
to be able to set the correct enable bit in the device tree:
when trying to correct the bit assignment in the device tree,
the system would hang.

Cc: Mike Turquette <mturquette@linaro.org>
Acked-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

2013-10-18 13:25:28 +02:00

..

abx500-clk.c

clk: ux500: abx500-clk: rename ux500 audio codec aliases

2013-05-28 22:50:31 -07:00

clk-prcc.c

ARM: ux500: get rid of <mach/[hardware|db8500-regs].h>

2013-04-08 13:59:28 +02:00

clk-prcmu.c

clk: ux500: Fix prcmu clocks registration

2013-03-27 08:35:33 -07:00

clk-sysctrl.c

clk: ux500: clk-sysctrl: handle clocks with no parents

2013-05-29 11:52:18 -07:00

clk.h

clk: ux500: fix mismatched types

2013-04-22 11:46:10 -07:00

Makefile

clk: ux500: Copy u8500_clk_init() ready for DT enablement

2013-09-26 11:05:26 +02:00

u8500_clk.c

clk: ux500: Provide device enumeration number suffix for SMSC911x

2013-05-29 11:52:18 -07:00

u8500_of_clk.c

clk: ux500: fix erroneous bit assignment

2013-10-18 13:25:28 +02:00

u8540_clk.c

clk: ux500: Remove BML8580 clock

2013-09-26 11:05:22 +02:00

u9540_clk.c

clk: ux500: Pass clock base adresses in initcall for u8540 and u9540

2013-06-06 18:16:04 -07:00