linux/arch/arm/mach-highbank
Russell King e761f6f332 ARM: l2c: highbank: remove explicit SMI call in L2 cache initialisation
Now that highbank uses the write_sec method, we don't need to enable
the L2 cache in SoC specific code; this can be done via the normal
mechanisms in the L2C code.

Checking with Rob Herring:
> > Can we kill the "highbank_smc1(0x102, 0x1);" here?	That means
> > l2x0_of_init() will see the L2 cache disabled, and will try to enable
> > it via the write_sec hook, so it should do the right thing.
>
> Yes, that should work. You should be able to just call l2x0_of_init
> unconditionally. The condition was really to just avoid the smc on
> Midway which does get handled on h/w, but not if running virtualized.

So also drop the DT check too.  I'm leaving the config check in place
so that if L2 is disabled, the write_sec hook can be optimised away.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2014-05-30 00:49:18 +01:00
..
core.h ARM: highbank: adapt to use ARM PSCI calls 2013-10-01 16:34:16 -05:00
highbank.c ARM: l2c: highbank: remove explicit SMI call in L2 cache initialisation 2014-05-30 00:49:18 +01:00
Kconfig ARM: select HAVE_SMP for V7 multi-platform 2014-02-19 16:43:27 -06:00
Makefile ARM: highbank: adapt to use ARM PSCI calls 2013-10-01 16:34:16 -05:00
pm.c ARM: highbank: adapt to use ARM PSCI calls 2013-10-01 16:34:16 -05:00
smc.S ARM: highbank: Add smc calls to enable/disable the L2 2012-06-07 22:39:43 -07:00
sysregs.h ARM: highbank: mask cluster id from cpu_logical_map 2013-01-31 13:54:30 -06:00
system.c reboot: arm: change reboot_mode to use enum reboot_mode 2013-07-09 10:33:29 -07:00