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4d2a863fe9
This patch adds support for R-Car E3. This SoC needs to release the PLL reset by the UGCTRL register like R-Car D3. So, this patch adds a usbhs_of_match entry for this SoC with "USBHS_TYPE_RCAR_GEN3_WITH_PLL". Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Reviewed-by: Simon Horman <horms+renesas@verge.net.au> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>