2019-05-19 12:07:45 +00:00
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# SPDX-License-Identifier: GPL-2.0-only
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2018-12-07 06:55:26 +00:00
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config INTEL_POWERCLAMP
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tristate "Intel PowerClamp idle injection driver"
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depends on X86
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depends on CPU_SUP_INTEL
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2023-02-01 18:28:53 +00:00
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depends on CPU_IDLE
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select POWERCAP
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select IDLE_INJECT
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2018-12-07 06:55:26 +00:00
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help
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Enable this to enable Intel PowerClamp idle injection driver. This
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enforce idle time which results in more package C-state residency. The
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user interface is exposed via generic thermal framework.
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2021-01-07 12:29:05 +00:00
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config X86_THERMAL_VECTOR
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def_bool y
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depends on X86 && CPU_SUP_INTEL && X86_LOCAL_APIC
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2022-12-19 15:46:15 +00:00
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config INTEL_TCC
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bool
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depends on X86
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2018-12-07 06:55:26 +00:00
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config X86_PKG_TEMP_THERMAL
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tristate "X86 package temperature thermal driver"
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depends on X86_THERMAL_VECTOR
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select THERMAL_GOV_USER_SPACE
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2022-12-19 15:46:19 +00:00
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select INTEL_TCC
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2018-12-07 06:55:26 +00:00
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default m
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help
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Enable this to register CPU digital sensor for package temperature as
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thermal zone. Each package will have its own thermal zone. There are
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two trip points which can be set by user to get notifications via thermal
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notification methods.
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config INTEL_SOC_DTS_IOSF_CORE
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tristate
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depends on X86 && PCI
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select IOSF_MBI
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2022-12-19 15:46:17 +00:00
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select INTEL_TCC
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2018-12-07 06:55:26 +00:00
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help
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This is becoming a common feature for Intel SoCs to expose the additional
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digital temperature sensors (DTSs) using side band interface (IOSF). This
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implements the common set of helper functions to register, get temperature
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and get/set thresholds on DTSs.
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config INTEL_SOC_DTS_THERMAL
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tristate "Intel SoCs DTS thermal driver"
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depends on X86 && PCI && ACPI
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select INTEL_SOC_DTS_IOSF_CORE
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help
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Enable this to register Intel SoCs (e.g. Bay Trail) platform digital
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temperature sensor (DTS). These SoCs have two additional DTSs in
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addition to DTSs on CPU cores. Each DTS will be registered as a
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thermal zone. There are two trip points. One of the trip point can
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be set by user mode programs to get notifications via Linux thermal
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notification methods.The other trip is a critical trip point, which
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was set by the driver based on the TJ MAX temperature.
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config INTEL_QUARK_DTS_THERMAL
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tristate "Intel Quark DTS thermal driver"
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depends on X86_INTEL_QUARK
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help
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Enable this to register Intel Quark SoC (e.g. X1000) platform digital
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temperature sensor (DTS). For X1000 SoC, it has one on-die DTS.
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The DTS will be registered as a thermal zone. There are two trip points:
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hot & critical. The critical trip point default value is set by
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underlying BIOS/Firmware.
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menu "ACPI INT340X thermal drivers"
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2018-12-16 23:57:15 +00:00
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source "drivers/thermal/intel/int340x_thermal/Kconfig"
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2018-12-07 06:55:26 +00:00
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endmenu
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config INTEL_BXT_PMIC_THERMAL
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tristate "Intel Broxton PMIC thermal driver"
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2023-02-26 05:39:52 +00:00
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depends on X86 && INTEL_SOC_PMIC_BXTWC
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select REGMAP
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2018-12-07 06:55:26 +00:00
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help
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Select this driver for Intel Broxton PMIC with ADC channels monitoring
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system temperature measurements and alerts.
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This driver is used for monitoring the ADC channels of PMIC and handles
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the alert trip point interrupts and notifies the thermal framework with
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the trip point and temperature details of the zone.
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config INTEL_PCH_THERMAL
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tristate "Intel PCH Thermal Reporting Driver"
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depends on X86 && PCI
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2023-10-17 20:05:23 +00:00
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select ACPI_THERMAL_LIB if ACPI
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2018-12-07 06:55:26 +00:00
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help
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Enable this to support thermal reporting on certain intel PCHs.
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Thermal reporting device will provide temperature reading,
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programmable trip points and other information.
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thermal/drivers/intel: Introduce tcc cooling driver
On Intel processors, the core frequency can be reduced below OS request,
when the current temperature reaches the TCC (Thermal Control Circuit)
activation temperature.
The default TCC activation temperature is specified by
MSR_IA32_TEMPERATURE_TARGET. However, it can be adjusted by specifying an
offset in degrees C, using the TCC Offset bits in the same MSR register.
This patch introduces a cooling devices driver that utilizes the TCC
Offset feature. The bigger the current cooling state is, the lower the
effective TCC activation temperature is, so that the processors can be
throttled earlier before system critical overheats.
Note that, on different platforms, the behavior might be different on
how fast the setting takes effect, and how much the CPU frequency is
reduced.
This patch has been tested on a KabyLake mobile platform from me, and also
on a CometLake platform from Doug.
Signed-off-by: Zhang Rui <rui.zhang@intel.com>
Tested by: Doug Smythies <dsmythies@telus.net>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Link: https://lore.kernel.org/r/20210412125901.12549-1-rui.zhang@intel.com
2021-04-12 12:59:01 +00:00
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config INTEL_TCC_COOLING
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tristate "Intel TCC offset cooling Driver"
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depends on X86
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2022-12-19 15:46:18 +00:00
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select INTEL_TCC
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thermal/drivers/intel: Introduce tcc cooling driver
On Intel processors, the core frequency can be reduced below OS request,
when the current temperature reaches the TCC (Thermal Control Circuit)
activation temperature.
The default TCC activation temperature is specified by
MSR_IA32_TEMPERATURE_TARGET. However, it can be adjusted by specifying an
offset in degrees C, using the TCC Offset bits in the same MSR register.
This patch introduces a cooling devices driver that utilizes the TCC
Offset feature. The bigger the current cooling state is, the lower the
effective TCC activation temperature is, so that the processors can be
throttled earlier before system critical overheats.
Note that, on different platforms, the behavior might be different on
how fast the setting takes effect, and how much the CPU frequency is
reduced.
This patch has been tested on a KabyLake mobile platform from me, and also
on a CometLake platform from Doug.
Signed-off-by: Zhang Rui <rui.zhang@intel.com>
Tested by: Doug Smythies <dsmythies@telus.net>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Link: https://lore.kernel.org/r/20210412125901.12549-1-rui.zhang@intel.com
2021-04-12 12:59:01 +00:00
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help
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Enable this to support system cooling by adjusting the effective TCC
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activation temperature via the TCC Offset register, which is widely
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supported on modern Intel platforms.
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Note that, on different platforms, the behavior might be different
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on how fast the setting takes effect, and how much the CPU frequency
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is reduced.
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2021-08-16 03:53:56 +00:00
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2022-01-27 19:34:50 +00:00
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config INTEL_HFI_THERMAL
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bool "Intel Hardware Feedback Interface"
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2022-02-09 00:15:46 +00:00
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depends on NET
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2022-01-27 19:34:50 +00:00
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depends on CPU_SUP_INTEL
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depends on X86_THERMAL_VECTOR
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thermal: intel: hfi: Notify user space for HFI events
When the hardware issues an HFI event, relay a notification to user space.
This allows user space to respond by reading performance and efficiency of
each CPU and take appropriate action.
For example, when the performance and efficiency of a CPU is 0, user space
can either offline the CPU or inject idle. Also, if user space notices a
downward trend in performance, it may proactively adjust power limits to
avoid future situations in which performance drops to 0.
To avoid excessive notifications, the rate is limited by one HZ per event.
To limit the netlink message size, send parameters for up to 16 CPUs in a
single message. If there are more than 16 CPUs, issue as many messages as
needed to notify the status of all CPUs.
In the HFI specification, both performance and efficiency capabilities are
defined in the [0, 255] range. The existing implementations of HFI hardware
do not scale the maximum values to 255. Since userspace cares about
capability values that are either 0 or show a downward/upward trend, this
fact does not matter much. Relative changes in capabilities are enough. To
comply with the thermal netlink ABI, scale both performance and efficiency
capabilities to the [0, 1023] interval.
Reviewed-by: Len Brown <len.brown@intel.com>
Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2022-01-27 19:34:54 +00:00
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select THERMAL_NETLINK
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2022-01-27 19:34:50 +00:00
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help
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Select this option to enable the Hardware Feedback Interface. If
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selected, hardware provides guidance to the operating system on
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the performance and energy efficiency capabilities of each CPU.
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These capabilities may change as a result of changes in the operating
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conditions of the system such power and thermal limits. If selected,
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the kernel relays updates in CPUs' capabilities to userspace.
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