mirror of
https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git
synced 2025-01-07 22:42:04 +00:00
RISC-V Devicetrees for v6.10
Microchip: A simple addition of a power-monitor on the Icicle dev board, as the binding for it is now in mainline. StarFive: Support for the Milk-V Mars. This board is incredibly similar to the VisionFive v2 that is already supported, with only the really ethernet configuration being slightly different. Emil requested that a common dtsi file, so my fixes branch is pulled into for-next to avoid an annoying conflict between moved content and some erroneously added nodes that were removed as fixes this cycle. T-Head: Re-ordering of some nodes to match the DTS coding style on the th1520. Signed-off-by: Conor Dooley <conor.dooley@microchip.com> -----BEGIN PGP SIGNATURE----- iHUEABYIAB0WIQRh246EGq/8RLhDjO14tDGHoIJi0gUCZjvZxQAKCRB4tDGHoIJi 0rt/AQDBIGqrvMfTFUM4Rs8FznDpMffDR5DR4h+zrTbT5XR1LwEAnFnDuMTGufFT xmfgB9+kbOCPpMyBSyu8NB7wUF47qgI= =Vcbm -----END PGP SIGNATURE----- gpgsig -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEiK/NIGsWEZVxh/FrYKtH/8kJUicFAmY73yQACgkQYKtH/8kJ Uif7bQ//W4qvHgqtqK9A6eGNOV1NOs8NM7rx86dl9Fi0VclDgdeCDT8rsF5yoUST 3JuRS18HHTD+1Irvh6zrlOxMnxf6i8B36RKZ9zZkoP7gWHo9jDkqYx6PdrxE6be7 5uPGvdj6amvav0bincF/Cpnwct8FghVKjo680wp4Aku00miG+0ANyTPW+0FAidqJ 7zsJS3ebTVy2GiDFecG123BfZhnMxuxM0bQNe+yFURVwFat09g3hTrPXUzZkWKtp 6wlP1wEpjWPGXYnBG3a3ESX6l12vc1ab8J0j5vDgW4C64v1etFbztVWT7yMYFVoA rTyyBHyLlL+1R/AAJ2C4B0/LRNsJc88U8kk6/lwtRKZkr+zumO4QUvrgewIF0LJD LUEMyWbTGLQ6RfIAEjutTQS2EXejxlV9dGqk/PZzUhwrR3NiVDWuosrjDHOFEtk3 5VOgpgBNt2Q3GbDkGl+RKlzmnLdHJ6Dk52DuJfJTwZbwssogflxVS4OmUxhiY7jU 6rxnk4JRvmygYEGWbqVueixloJgU8mer1QeDcyjbUnSiM/fcRfxSdzxFCzjRfYg5 b/uIYC8uSrIycYy31XTeO1Ukwjv1Vr2uU3I8Pfl5VkTx1msR6uGtZOZM7tLBrpZq VsrHzij8VLm3/nPnY49CmvwYSTvFbLfZik/TM6ZF0Hj8/212AnE= =Yem+ -----END PGP SIGNATURE----- Merge tag 'riscv-dt-for-v6.10-take2' of https://git.kernel.org/pub/scm/linux/kernel/git/conor/linux into soc/dt-late RISC-V Devicetrees for v6.10 Microchip: A simple addition of a power-monitor on the Icicle dev board, as the binding for it is now in mainline. StarFive: Support for the Milk-V Mars. This board is incredibly similar to the VisionFive v2 that is already supported, with only the really ethernet configuration being slightly different. Emil requested that a common dtsi file, so my fixes branch is pulled into for-next to avoid an annoying conflict between moved content and some erroneously added nodes that were removed as fixes this cycle. T-Head: Re-ordering of some nodes to match the DTS coding style on the th1520. Signed-off-by: Conor Dooley <conor.dooley@microchip.com> * tag 'riscv-dt-for-v6.10-take2' of https://git.kernel.org/pub/scm/linux/kernel/git/conor/linux: riscv: dts: microchip: add pac1934 power-monitor to icicle riscv: dts: thead: Fix node ordering in TH1520 device tree riscv: dts: starfive: add Milkv Mars board device tree riscv: dts: starfive: introduce a common board dtsi for jh7110 based boards riscv: dts: starfive: visionfive 2: add "disable-wp" for tfcard riscv: dts: starfive: visionfive 2: add tf cd-gpios riscv: dts: starfive: visionfive 2: use cpus label for timebase freq riscv: dts: starfive: visionfive 2: update sound and codec dt node name dt-bindings: riscv: starfive: add Milkv Mars board riscv: dts: starfive: add 'cpus' label to jh7110 and jh7100 soc dtsi riscv: dts: starfive: visionfive 2: Remove non-existing I2S hardware riscv: dts: starfive: visionfive 2: Remove non-existing TDM hardware riscv: dts: starfive: Remove PMIC interrupt info for Visionfive 2 board Link: https://lore.kernel.org/r/20240508-crafter-cement-4f54e4182270@spud Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
Arnd Bergmann
commit
01a7f9e1a9
@ -26,6 +26,7 @@ properties:
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- items:
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- enum:
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- milkv,mars
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- starfive,visionfive-2-v1.2a
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- starfive,visionfive-2-v1.3b
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- const: starfive,jh7110
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@ -100,6 +100,38 @@ &i2c0 {
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&i2c1 {
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status = "okay";
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power-monitor@10 {
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compatible = "microchip,pac1934";
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reg = <0x10>;
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#address-cells = <1>;
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#size-cells = <0>;
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channel@1 {
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reg = <0x1>;
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shunt-resistor-micro-ohms = <10000>;
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label = "VDDREG";
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};
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channel@2 {
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reg = <0x2>;
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shunt-resistor-micro-ohms = <10000>;
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label = "VDDA25";
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};
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channel@3 {
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reg = <0x3>;
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shunt-resistor-micro-ohms = <10000>;
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label = "VDD25";
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};
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channel@4 {
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reg = <0x4>;
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shunt-resistor-micro-ohms = <10000>;
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label = "VDDA_REG";
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};
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};
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};
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&i2c2 {
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@ -8,5 +8,6 @@ DTC_FLAGS_jh7110-starfive-visionfive-2-v1.3b := -@
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dtb-$(CONFIG_ARCH_STARFIVE) += jh7100-beaglev-starlight.dtb
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dtb-$(CONFIG_ARCH_STARFIVE) += jh7100-starfive-visionfive-v1.dtb
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dtb-$(CONFIG_ARCH_STARFIVE) += jh7110-milkv-mars.dtb
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dtb-$(CONFIG_ARCH_STARFIVE) += jh7110-starfive-visionfive-2-v1.2a.dtb
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dtb-$(CONFIG_ARCH_STARFIVE) += jh7110-starfive-visionfive-2-v1.3b.dtb
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@ -13,7 +13,7 @@ / {
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#address-cells = <2>;
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#size-cells = <2>;
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cpus {
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cpus: cpus {
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#address-cells = <1>;
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#size-cells = <0>;
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599
arch/riscv/boot/dts/starfive/jh7110-common.dtsi
Normal file
599
arch/riscv/boot/dts/starfive/jh7110-common.dtsi
Normal file
@ -0,0 +1,599 @@
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// SPDX-License-Identifier: GPL-2.0 OR MIT
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/*
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* Copyright (C) 2022 StarFive Technology Co., Ltd.
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* Copyright (C) 2022 Emil Renner Berthing <kernel@esmil.dk>
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*/
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/dts-v1/;
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#include "jh7110.dtsi"
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#include "jh7110-pinfunc.h"
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#include <dt-bindings/gpio/gpio.h>
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/ {
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aliases {
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ethernet0 = &gmac0;
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i2c0 = &i2c0;
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i2c2 = &i2c2;
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i2c5 = &i2c5;
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i2c6 = &i2c6;
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mmc0 = &mmc0;
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mmc1 = &mmc1;
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serial0 = &uart0;
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};
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chosen {
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stdout-path = "serial0:115200n8";
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};
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memory@40000000 {
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device_type = "memory";
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reg = <0x0 0x40000000 0x1 0x0>;
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};
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gpio-restart {
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compatible = "gpio-restart";
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gpios = <&sysgpio 35 GPIO_ACTIVE_HIGH>;
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priority = <224>;
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};
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pwmdac_codec: audio-codec {
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compatible = "linux,spdif-dit";
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#sound-dai-cells = <0>;
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};
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sound {
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compatible = "simple-audio-card";
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simple-audio-card,name = "StarFive-PWMDAC-Sound-Card";
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#address-cells = <1>;
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#size-cells = <0>;
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simple-audio-card,dai-link@0 {
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reg = <0>;
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format = "left_j";
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bitclock-master = <&sndcpu0>;
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frame-master = <&sndcpu0>;
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sndcpu0: cpu {
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sound-dai = <&pwmdac>;
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};
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codec {
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sound-dai = <&pwmdac_codec>;
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};
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};
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};
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};
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&cpus {
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timebase-frequency = <4000000>;
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};
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&dvp_clk {
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clock-frequency = <74250000>;
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};
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&gmac0_rgmii_rxin {
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clock-frequency = <125000000>;
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};
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&gmac0_rmii_refin {
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clock-frequency = <50000000>;
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};
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&gmac1_rgmii_rxin {
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clock-frequency = <125000000>;
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};
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&gmac1_rmii_refin {
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clock-frequency = <50000000>;
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};
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&hdmitx0_pixelclk {
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clock-frequency = <297000000>;
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};
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&i2srx_bclk_ext {
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clock-frequency = <12288000>;
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};
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&i2srx_lrck_ext {
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clock-frequency = <192000>;
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};
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&i2stx_bclk_ext {
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clock-frequency = <12288000>;
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};
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&i2stx_lrck_ext {
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clock-frequency = <192000>;
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};
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&mclk_ext {
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clock-frequency = <12288000>;
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};
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&osc {
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clock-frequency = <24000000>;
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};
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&rtc_osc {
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clock-frequency = <32768>;
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};
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&tdm_ext {
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clock-frequency = <49152000>;
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};
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&camss {
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assigned-clocks = <&ispcrg JH7110_ISPCLK_DOM4_APB_FUNC>,
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<&ispcrg JH7110_ISPCLK_MIPI_RX0_PXL>;
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assigned-clock-rates = <49500000>, <198000000>;
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status = "okay";
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@0 {
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reg = <0>;
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};
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port@1 {
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reg = <1>;
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camss_from_csi2rx: endpoint {
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remote-endpoint = <&csi2rx_to_camss>;
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};
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};
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};
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};
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&csi2rx {
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assigned-clocks = <&ispcrg JH7110_ISPCLK_VIN_SYS>;
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assigned-clock-rates = <297000000>;
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status = "okay";
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@0 {
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reg = <0>;
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/* remote MIPI sensor endpoint */
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};
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port@1 {
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reg = <1>;
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csi2rx_to_camss: endpoint {
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remote-endpoint = <&camss_from_csi2rx>;
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};
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};
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};
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};
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&gmac0 {
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phy-handle = <&phy0>;
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phy-mode = "rgmii-id";
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status = "okay";
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mdio {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "snps,dwmac-mdio";
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phy0: ethernet-phy@0 {
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reg = <0>;
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};
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};
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};
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&i2c0 {
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clock-frequency = <100000>;
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i2c-sda-hold-time-ns = <300>;
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i2c-sda-falling-time-ns = <510>;
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i2c-scl-falling-time-ns = <510>;
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pinctrl-names = "default";
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pinctrl-0 = <&i2c0_pins>;
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status = "okay";
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};
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&i2c2 {
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clock-frequency = <100000>;
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i2c-sda-hold-time-ns = <300>;
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i2c-sda-falling-time-ns = <510>;
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i2c-scl-falling-time-ns = <510>;
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pinctrl-names = "default";
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pinctrl-0 = <&i2c2_pins>;
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status = "okay";
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};
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&i2c5 {
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clock-frequency = <100000>;
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i2c-sda-hold-time-ns = <300>;
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i2c-sda-falling-time-ns = <510>;
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i2c-scl-falling-time-ns = <510>;
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pinctrl-names = "default";
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pinctrl-0 = <&i2c5_pins>;
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status = "okay";
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axp15060: pmic@36 {
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compatible = "x-powers,axp15060";
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reg = <0x36>;
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interrupt-controller;
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#interrupt-cells = <1>;
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regulators {
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vcc_3v3: dcdc1 {
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regulator-boot-on;
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regulator-always-on;
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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regulator-name = "vcc_3v3";
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};
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vdd_cpu: dcdc2 {
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regulator-always-on;
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regulator-min-microvolt = <500000>;
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regulator-max-microvolt = <1540000>;
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regulator-name = "vdd-cpu";
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};
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emmc_vdd: aldo4 {
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regulator-boot-on;
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regulator-always-on;
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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regulator-name = "emmc_vdd";
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};
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};
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};
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};
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&i2c6 {
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clock-frequency = <100000>;
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i2c-sda-hold-time-ns = <300>;
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i2c-sda-falling-time-ns = <510>;
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i2c-scl-falling-time-ns = <510>;
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pinctrl-names = "default";
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pinctrl-0 = <&i2c6_pins>;
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status = "okay";
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};
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&mmc0 {
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max-frequency = <100000000>;
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assigned-clocks = <&syscrg JH7110_SYSCLK_SDIO0_SDCARD>;
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assigned-clock-rates = <50000000>;
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bus-width = <8>;
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cap-mmc-highspeed;
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mmc-ddr-1_8v;
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mmc-hs200-1_8v;
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cap-mmc-hw-reset;
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post-power-on-delay-ms = <200>;
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pinctrl-names = "default";
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pinctrl-0 = <&mmc0_pins>;
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vmmc-supply = <&vcc_3v3>;
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vqmmc-supply = <&emmc_vdd>;
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status = "okay";
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};
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&mmc1 {
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max-frequency = <100000000>;
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assigned-clocks = <&syscrg JH7110_SYSCLK_SDIO1_SDCARD>;
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assigned-clock-rates = <50000000>;
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bus-width = <4>;
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no-sdio;
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no-mmc;
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cd-gpios = <&sysgpio 41 GPIO_ACTIVE_LOW>;
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disable-wp;
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cap-sd-highspeed;
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post-power-on-delay-ms = <200>;
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pinctrl-names = "default";
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pinctrl-0 = <&mmc1_pins>;
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status = "okay";
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};
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&pwmdac {
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pinctrl-names = "default";
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pinctrl-0 = <&pwmdac_pins>;
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status = "okay";
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};
|
||||
|
||||
&qspi {
|
||||
#address-cells = <1>;
|
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#size-cells = <0>;
|
||||
status = "okay";
|
||||
|
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nor_flash: flash@0 {
|
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compatible = "jedec,spi-nor";
|
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reg = <0>;
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cdns,read-delay = <5>;
|
||||
spi-max-frequency = <12000000>;
|
||||
cdns,tshsl-ns = <1>;
|
||||
cdns,tsd2d-ns = <1>;
|
||||
cdns,tchsh-ns = <1>;
|
||||
cdns,tslch-ns = <1>;
|
||||
|
||||
partitions {
|
||||
compatible = "fixed-partitions";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
|
||||
spl@0 {
|
||||
reg = <0x0 0x80000>;
|
||||
};
|
||||
uboot-env@f0000 {
|
||||
reg = <0xf0000 0x10000>;
|
||||
};
|
||||
uboot@100000 {
|
||||
reg = <0x100000 0x400000>;
|
||||
};
|
||||
reserved-data@600000 {
|
||||
reg = <0x600000 0xa00000>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&pwm {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pwm_pins>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&spi0 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&spi0_pins>;
|
||||
status = "okay";
|
||||
|
||||
spi_dev0: spi@0 {
|
||||
compatible = "rohm,dh2228fv";
|
||||
reg = <0>;
|
||||
spi-max-frequency = <10000000>;
|
||||
};
|
||||
};
|
||||
|
||||
&sysgpio {
|
||||
i2c0_pins: i2c0-0 {
|
||||
i2c-pins {
|
||||
pinmux = <GPIOMUX(57, GPOUT_LOW,
|
||||
GPOEN_SYS_I2C0_CLK,
|
||||
GPI_SYS_I2C0_CLK)>,
|
||||
<GPIOMUX(58, GPOUT_LOW,
|
||||
GPOEN_SYS_I2C0_DATA,
|
||||
GPI_SYS_I2C0_DATA)>;
|
||||
bias-disable; /* external pull-up */
|
||||
input-enable;
|
||||
input-schmitt-enable;
|
||||
};
|
||||
};
|
||||
|
||||
i2c2_pins: i2c2-0 {
|
||||
i2c-pins {
|
||||
pinmux = <GPIOMUX(3, GPOUT_LOW,
|
||||
GPOEN_SYS_I2C2_CLK,
|
||||
GPI_SYS_I2C2_CLK)>,
|
||||
<GPIOMUX(2, GPOUT_LOW,
|
||||
GPOEN_SYS_I2C2_DATA,
|
||||
GPI_SYS_I2C2_DATA)>;
|
||||
bias-disable; /* external pull-up */
|
||||
input-enable;
|
||||
input-schmitt-enable;
|
||||
};
|
||||
};
|
||||
|
||||
i2c5_pins: i2c5-0 {
|
||||
i2c-pins {
|
||||
pinmux = <GPIOMUX(19, GPOUT_LOW,
|
||||
GPOEN_SYS_I2C5_CLK,
|
||||
GPI_SYS_I2C5_CLK)>,
|
||||
<GPIOMUX(20, GPOUT_LOW,
|
||||
GPOEN_SYS_I2C5_DATA,
|
||||
GPI_SYS_I2C5_DATA)>;
|
||||
bias-disable; /* external pull-up */
|
||||
input-enable;
|
||||
input-schmitt-enable;
|
||||
};
|
||||
};
|
||||
|
||||
i2c6_pins: i2c6-0 {
|
||||
i2c-pins {
|
||||
pinmux = <GPIOMUX(16, GPOUT_LOW,
|
||||
GPOEN_SYS_I2C6_CLK,
|
||||
GPI_SYS_I2C6_CLK)>,
|
||||
<GPIOMUX(17, GPOUT_LOW,
|
||||
GPOEN_SYS_I2C6_DATA,
|
||||
GPI_SYS_I2C6_DATA)>;
|
||||
bias-disable; /* external pull-up */
|
||||
input-enable;
|
||||
input-schmitt-enable;
|
||||
};
|
||||
};
|
||||
|
||||
mmc0_pins: mmc0-0 {
|
||||
rst-pins {
|
||||
pinmux = <GPIOMUX(62, GPOUT_SYS_SDIO0_RST,
|
||||
GPOEN_ENABLE,
|
||||
GPI_NONE)>;
|
||||
bias-pull-up;
|
||||
drive-strength = <12>;
|
||||
input-disable;
|
||||
input-schmitt-disable;
|
||||
slew-rate = <0>;
|
||||
};
|
||||
|
||||
mmc-pins {
|
||||
pinmux = <PINMUX(64, 0)>,
|
||||
<PINMUX(65, 0)>,
|
||||
<PINMUX(66, 0)>,
|
||||
<PINMUX(67, 0)>,
|
||||
<PINMUX(68, 0)>,
|
||||
<PINMUX(69, 0)>,
|
||||
<PINMUX(70, 0)>,
|
||||
<PINMUX(71, 0)>,
|
||||
<PINMUX(72, 0)>,
|
||||
<PINMUX(73, 0)>;
|
||||
bias-pull-up;
|
||||
drive-strength = <12>;
|
||||
input-enable;
|
||||
};
|
||||
};
|
||||
|
||||
mmc1_pins: mmc1-0 {
|
||||
clk-pins {
|
||||
pinmux = <GPIOMUX(10, GPOUT_SYS_SDIO1_CLK,
|
||||
GPOEN_ENABLE,
|
||||
GPI_NONE)>;
|
||||
bias-pull-up;
|
||||
drive-strength = <12>;
|
||||
input-disable;
|
||||
input-schmitt-disable;
|
||||
slew-rate = <0>;
|
||||
};
|
||||
|
||||
mmc-pins {
|
||||
pinmux = <GPIOMUX(9, GPOUT_SYS_SDIO1_CMD,
|
||||
GPOEN_SYS_SDIO1_CMD,
|
||||
GPI_SYS_SDIO1_CMD)>,
|
||||
<GPIOMUX(11, GPOUT_SYS_SDIO1_DATA0,
|
||||
GPOEN_SYS_SDIO1_DATA0,
|
||||
GPI_SYS_SDIO1_DATA0)>,
|
||||
<GPIOMUX(12, GPOUT_SYS_SDIO1_DATA1,
|
||||
GPOEN_SYS_SDIO1_DATA1,
|
||||
GPI_SYS_SDIO1_DATA1)>,
|
||||
<GPIOMUX(7, GPOUT_SYS_SDIO1_DATA2,
|
||||
GPOEN_SYS_SDIO1_DATA2,
|
||||
GPI_SYS_SDIO1_DATA2)>,
|
||||
<GPIOMUX(8, GPOUT_SYS_SDIO1_DATA3,
|
||||
GPOEN_SYS_SDIO1_DATA3,
|
||||
GPI_SYS_SDIO1_DATA3)>;
|
||||
bias-pull-up;
|
||||
drive-strength = <12>;
|
||||
input-enable;
|
||||
input-schmitt-enable;
|
||||
slew-rate = <0>;
|
||||
};
|
||||
};
|
||||
|
||||
pwmdac_pins: pwmdac-0 {
|
||||
pwmdac-pins {
|
||||
pinmux = <GPIOMUX(33, GPOUT_SYS_PWMDAC_LEFT,
|
||||
GPOEN_ENABLE,
|
||||
GPI_NONE)>,
|
||||
<GPIOMUX(34, GPOUT_SYS_PWMDAC_RIGHT,
|
||||
GPOEN_ENABLE,
|
||||
GPI_NONE)>;
|
||||
bias-disable;
|
||||
drive-strength = <2>;
|
||||
input-disable;
|
||||
input-schmitt-disable;
|
||||
slew-rate = <0>;
|
||||
};
|
||||
};
|
||||
|
||||
pwm_pins: pwm-0 {
|
||||
pwm-pins {
|
||||
pinmux = <GPIOMUX(46, GPOUT_SYS_PWM_CHANNEL0,
|
||||
GPOEN_SYS_PWM0_CHANNEL0,
|
||||
GPI_NONE)>,
|
||||
<GPIOMUX(59, GPOUT_SYS_PWM_CHANNEL1,
|
||||
GPOEN_SYS_PWM0_CHANNEL1,
|
||||
GPI_NONE)>;
|
||||
bias-disable;
|
||||
drive-strength = <12>;
|
||||
input-disable;
|
||||
input-schmitt-disable;
|
||||
slew-rate = <0>;
|
||||
};
|
||||
};
|
||||
|
||||
spi0_pins: spi0-0 {
|
||||
mosi-pins {
|
||||
pinmux = <GPIOMUX(52, GPOUT_SYS_SPI0_TXD,
|
||||
GPOEN_ENABLE,
|
||||
GPI_NONE)>;
|
||||
bias-disable;
|
||||
input-disable;
|
||||
input-schmitt-disable;
|
||||
};
|
||||
|
||||
miso-pins {
|
||||
pinmux = <GPIOMUX(53, GPOUT_LOW,
|
||||
GPOEN_DISABLE,
|
||||
GPI_SYS_SPI0_RXD)>;
|
||||
bias-pull-up;
|
||||
input-enable;
|
||||
input-schmitt-enable;
|
||||
};
|
||||
|
||||
sck-pins {
|
||||
pinmux = <GPIOMUX(48, GPOUT_SYS_SPI0_CLK,
|
||||
GPOEN_ENABLE,
|
||||
GPI_SYS_SPI0_CLK)>;
|
||||
bias-disable;
|
||||
input-disable;
|
||||
input-schmitt-disable;
|
||||
};
|
||||
|
||||
ss-pins {
|
||||
pinmux = <GPIOMUX(49, GPOUT_SYS_SPI0_FSS,
|
||||
GPOEN_ENABLE,
|
||||
GPI_SYS_SPI0_FSS)>;
|
||||
bias-disable;
|
||||
input-disable;
|
||||
input-schmitt-disable;
|
||||
};
|
||||
};
|
||||
|
||||
uart0_pins: uart0-0 {
|
||||
tx-pins {
|
||||
pinmux = <GPIOMUX(5, GPOUT_SYS_UART0_TX,
|
||||
GPOEN_ENABLE,
|
||||
GPI_NONE)>;
|
||||
bias-disable;
|
||||
drive-strength = <12>;
|
||||
input-disable;
|
||||
input-schmitt-disable;
|
||||
slew-rate = <0>;
|
||||
};
|
||||
|
||||
rx-pins {
|
||||
pinmux = <GPIOMUX(6, GPOUT_LOW,
|
||||
GPOEN_DISABLE,
|
||||
GPI_SYS_UART0_RX)>;
|
||||
bias-disable; /* external pull-up */
|
||||
drive-strength = <2>;
|
||||
input-enable;
|
||||
input-schmitt-enable;
|
||||
slew-rate = <0>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&uart0 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&uart0_pins>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usb0 {
|
||||
dr_mode = "peripheral";
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&U74_1 {
|
||||
cpu-supply = <&vdd_cpu>;
|
||||
};
|
||||
|
||||
&U74_2 {
|
||||
cpu-supply = <&vdd_cpu>;
|
||||
};
|
||||
|
||||
&U74_3 {
|
||||
cpu-supply = <&vdd_cpu>;
|
||||
};
|
||||
|
||||
&U74_4 {
|
||||
cpu-supply = <&vdd_cpu>;
|
||||
};
|
||||
30
arch/riscv/boot/dts/starfive/jh7110-milkv-mars.dts
Normal file
30
arch/riscv/boot/dts/starfive/jh7110-milkv-mars.dts
Normal file
@ -0,0 +1,30 @@
|
||||
// SPDX-License-Identifier: GPL-2.0 OR MIT
|
||||
/*
|
||||
* Copyright (C) 2023 Jisheng Zhang <jszhang@kernel.org>
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
#include "jh7110-common.dtsi"
|
||||
|
||||
/ {
|
||||
model = "Milk-V Mars";
|
||||
compatible = "milkv,mars", "starfive,jh7110";
|
||||
};
|
||||
|
||||
&gmac0 {
|
||||
starfive,tx-use-rgmii-clk;
|
||||
assigned-clocks = <&aoncrg JH7110_AONCLK_GMAC0_TX>;
|
||||
assigned-clock-parents = <&aoncrg JH7110_AONCLK_GMAC0_RMII_RTX>;
|
||||
};
|
||||
|
||||
|
||||
&phy0 {
|
||||
motorcomm,tx-clk-adj-enabled;
|
||||
motorcomm,tx-clk-10-inverted;
|
||||
motorcomm,tx-clk-100-inverted;
|
||||
motorcomm,tx-clk-1000-inverted;
|
||||
motorcomm,rx-clk-drv-microamp = <3970>;
|
||||
motorcomm,rx-data-drv-microamp = <2910>;
|
||||
rx-internal-delay-ps = <1500>;
|
||||
tx-internal-delay-ps = <1500>;
|
||||
};
|
||||
@ -5,188 +5,11 @@
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
#include "jh7110.dtsi"
|
||||
#include "jh7110-pinfunc.h"
|
||||
#include <dt-bindings/gpio/gpio.h>
|
||||
#include "jh7110-common.dtsi"
|
||||
|
||||
/ {
|
||||
aliases {
|
||||
ethernet0 = &gmac0;
|
||||
ethernet1 = &gmac1;
|
||||
i2c0 = &i2c0;
|
||||
i2c2 = &i2c2;
|
||||
i2c5 = &i2c5;
|
||||
i2c6 = &i2c6;
|
||||
mmc0 = &mmc0;
|
||||
mmc1 = &mmc1;
|
||||
serial0 = &uart0;
|
||||
};
|
||||
|
||||
chosen {
|
||||
stdout-path = "serial0:115200n8";
|
||||
};
|
||||
|
||||
cpus {
|
||||
timebase-frequency = <4000000>;
|
||||
};
|
||||
|
||||
memory@40000000 {
|
||||
device_type = "memory";
|
||||
reg = <0x0 0x40000000 0x1 0x0>;
|
||||
};
|
||||
|
||||
gpio-restart {
|
||||
compatible = "gpio-restart";
|
||||
gpios = <&sysgpio 35 GPIO_ACTIVE_HIGH>;
|
||||
priority = <224>;
|
||||
};
|
||||
|
||||
pwmdac_codec: pwmdac-codec {
|
||||
compatible = "linux,spdif-dit";
|
||||
#sound-dai-cells = <0>;
|
||||
};
|
||||
|
||||
sound-pwmdac {
|
||||
compatible = "simple-audio-card";
|
||||
simple-audio-card,name = "StarFive-PWMDAC-Sound-Card";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
simple-audio-card,dai-link@0 {
|
||||
reg = <0>;
|
||||
format = "left_j";
|
||||
bitclock-master = <&sndcpu0>;
|
||||
frame-master = <&sndcpu0>;
|
||||
|
||||
sndcpu0: cpu {
|
||||
sound-dai = <&pwmdac>;
|
||||
};
|
||||
|
||||
codec {
|
||||
sound-dai = <&pwmdac_codec>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&dvp_clk {
|
||||
clock-frequency = <74250000>;
|
||||
};
|
||||
|
||||
&gmac0_rgmii_rxin {
|
||||
clock-frequency = <125000000>;
|
||||
};
|
||||
|
||||
&gmac0_rmii_refin {
|
||||
clock-frequency = <50000000>;
|
||||
};
|
||||
|
||||
&gmac1_rgmii_rxin {
|
||||
clock-frequency = <125000000>;
|
||||
};
|
||||
|
||||
&gmac1_rmii_refin {
|
||||
clock-frequency = <50000000>;
|
||||
};
|
||||
|
||||
&hdmitx0_pixelclk {
|
||||
clock-frequency = <297000000>;
|
||||
};
|
||||
|
||||
&i2srx_bclk_ext {
|
||||
clock-frequency = <12288000>;
|
||||
};
|
||||
|
||||
&i2srx_lrck_ext {
|
||||
clock-frequency = <192000>;
|
||||
};
|
||||
|
||||
&i2stx_bclk_ext {
|
||||
clock-frequency = <12288000>;
|
||||
};
|
||||
|
||||
&i2stx_lrck_ext {
|
||||
clock-frequency = <192000>;
|
||||
};
|
||||
|
||||
&mclk_ext {
|
||||
clock-frequency = <12288000>;
|
||||
};
|
||||
|
||||
&osc {
|
||||
clock-frequency = <24000000>;
|
||||
};
|
||||
|
||||
&rtc_osc {
|
||||
clock-frequency = <32768>;
|
||||
};
|
||||
|
||||
&tdm_ext {
|
||||
clock-frequency = <49152000>;
|
||||
};
|
||||
|
||||
&camss {
|
||||
assigned-clocks = <&ispcrg JH7110_ISPCLK_DOM4_APB_FUNC>,
|
||||
<&ispcrg JH7110_ISPCLK_MIPI_RX0_PXL>;
|
||||
assigned-clock-rates = <49500000>, <198000000>;
|
||||
status = "okay";
|
||||
|
||||
ports {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
port@0 {
|
||||
reg = <0>;
|
||||
};
|
||||
|
||||
port@1 {
|
||||
reg = <1>;
|
||||
|
||||
camss_from_csi2rx: endpoint {
|
||||
remote-endpoint = <&csi2rx_to_camss>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&csi2rx {
|
||||
assigned-clocks = <&ispcrg JH7110_ISPCLK_VIN_SYS>;
|
||||
assigned-clock-rates = <297000000>;
|
||||
status = "okay";
|
||||
|
||||
ports {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
port@0 {
|
||||
reg = <0>;
|
||||
|
||||
/* remote MIPI sensor endpoint */
|
||||
};
|
||||
|
||||
port@1 {
|
||||
reg = <1>;
|
||||
|
||||
csi2rx_to_camss: endpoint {
|
||||
remote-endpoint = <&camss_from_csi2rx>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&gmac0 {
|
||||
phy-handle = <&phy0>;
|
||||
phy-mode = "rgmii-id";
|
||||
status = "okay";
|
||||
|
||||
mdio {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
compatible = "snps,dwmac-mdio";
|
||||
|
||||
phy0: ethernet-phy@0 {
|
||||
reg = <0>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
@ -206,510 +29,6 @@ phy1: ethernet-phy@1 {
|
||||
};
|
||||
};
|
||||
|
||||
&i2c0 {
|
||||
clock-frequency = <100000>;
|
||||
i2c-sda-hold-time-ns = <300>;
|
||||
i2c-sda-falling-time-ns = <510>;
|
||||
i2c-scl-falling-time-ns = <510>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&i2c0_pins>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&i2c2 {
|
||||
clock-frequency = <100000>;
|
||||
i2c-sda-hold-time-ns = <300>;
|
||||
i2c-sda-falling-time-ns = <510>;
|
||||
i2c-scl-falling-time-ns = <510>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&i2c2_pins>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&i2c5 {
|
||||
clock-frequency = <100000>;
|
||||
i2c-sda-hold-time-ns = <300>;
|
||||
i2c-sda-falling-time-ns = <510>;
|
||||
i2c-scl-falling-time-ns = <510>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&i2c5_pins>;
|
||||
status = "okay";
|
||||
|
||||
axp15060: pmic@36 {
|
||||
compatible = "x-powers,axp15060";
|
||||
reg = <0x36>;
|
||||
interrupts = <0>;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <1>;
|
||||
|
||||
regulators {
|
||||
vcc_3v3: dcdc1 {
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
regulator-name = "vcc_3v3";
|
||||
};
|
||||
|
||||
vdd_cpu: dcdc2 {
|
||||
regulator-always-on;
|
||||
regulator-min-microvolt = <500000>;
|
||||
regulator-max-microvolt = <1540000>;
|
||||
regulator-name = "vdd-cpu";
|
||||
};
|
||||
|
||||
emmc_vdd: aldo4 {
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
regulator-name = "emmc_vdd";
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&i2c6 {
|
||||
clock-frequency = <100000>;
|
||||
i2c-sda-hold-time-ns = <300>;
|
||||
i2c-sda-falling-time-ns = <510>;
|
||||
i2c-scl-falling-time-ns = <510>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&i2c6_pins>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&i2srx {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&i2srx_pins>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&i2stx0 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&mclk_ext_pins>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&i2stx1 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&i2stx1_pins>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&mmc0 {
|
||||
max-frequency = <100000000>;
|
||||
assigned-clocks = <&syscrg JH7110_SYSCLK_SDIO0_SDCARD>;
|
||||
assigned-clock-rates = <50000000>;
|
||||
bus-width = <8>;
|
||||
cap-mmc-highspeed;
|
||||
mmc-ddr-1_8v;
|
||||
mmc-hs200-1_8v;
|
||||
non-removable;
|
||||
cap-mmc-hw-reset;
|
||||
post-power-on-delay-ms = <200>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&mmc0_pins>;
|
||||
vmmc-supply = <&vcc_3v3>;
|
||||
vqmmc-supply = <&emmc_vdd>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&mmc1 {
|
||||
max-frequency = <100000000>;
|
||||
assigned-clocks = <&syscrg JH7110_SYSCLK_SDIO1_SDCARD>;
|
||||
assigned-clock-rates = <50000000>;
|
||||
bus-width = <4>;
|
||||
no-sdio;
|
||||
no-mmc;
|
||||
broken-cd;
|
||||
cap-sd-highspeed;
|
||||
post-power-on-delay-ms = <200>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&mmc1_pins>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&pwmdac {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pwmdac_pins>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&qspi {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
status = "okay";
|
||||
|
||||
nor_flash: flash@0 {
|
||||
compatible = "jedec,spi-nor";
|
||||
reg = <0>;
|
||||
cdns,read-delay = <5>;
|
||||
spi-max-frequency = <12000000>;
|
||||
cdns,tshsl-ns = <1>;
|
||||
cdns,tsd2d-ns = <1>;
|
||||
cdns,tchsh-ns = <1>;
|
||||
cdns,tslch-ns = <1>;
|
||||
|
||||
partitions {
|
||||
compatible = "fixed-partitions";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
|
||||
spl@0 {
|
||||
reg = <0x0 0x80000>;
|
||||
};
|
||||
uboot-env@f0000 {
|
||||
reg = <0xf0000 0x10000>;
|
||||
};
|
||||
uboot@100000 {
|
||||
reg = <0x100000 0x400000>;
|
||||
};
|
||||
reserved-data@600000 {
|
||||
reg = <0x600000 0xa00000>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&pwm {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pwm_pins>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&spi0 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&spi0_pins>;
|
||||
status = "okay";
|
||||
|
||||
spi_dev0: spi@0 {
|
||||
compatible = "rohm,dh2228fv";
|
||||
reg = <0>;
|
||||
spi-max-frequency = <10000000>;
|
||||
};
|
||||
};
|
||||
|
||||
&sysgpio {
|
||||
i2c0_pins: i2c0-0 {
|
||||
i2c-pins {
|
||||
pinmux = <GPIOMUX(57, GPOUT_LOW,
|
||||
GPOEN_SYS_I2C0_CLK,
|
||||
GPI_SYS_I2C0_CLK)>,
|
||||
<GPIOMUX(58, GPOUT_LOW,
|
||||
GPOEN_SYS_I2C0_DATA,
|
||||
GPI_SYS_I2C0_DATA)>;
|
||||
bias-disable; /* external pull-up */
|
||||
input-enable;
|
||||
input-schmitt-enable;
|
||||
};
|
||||
};
|
||||
|
||||
i2c2_pins: i2c2-0 {
|
||||
i2c-pins {
|
||||
pinmux = <GPIOMUX(3, GPOUT_LOW,
|
||||
GPOEN_SYS_I2C2_CLK,
|
||||
GPI_SYS_I2C2_CLK)>,
|
||||
<GPIOMUX(2, GPOUT_LOW,
|
||||
GPOEN_SYS_I2C2_DATA,
|
||||
GPI_SYS_I2C2_DATA)>;
|
||||
bias-disable; /* external pull-up */
|
||||
input-enable;
|
||||
input-schmitt-enable;
|
||||
};
|
||||
};
|
||||
|
||||
i2c5_pins: i2c5-0 {
|
||||
i2c-pins {
|
||||
pinmux = <GPIOMUX(19, GPOUT_LOW,
|
||||
GPOEN_SYS_I2C5_CLK,
|
||||
GPI_SYS_I2C5_CLK)>,
|
||||
<GPIOMUX(20, GPOUT_LOW,
|
||||
GPOEN_SYS_I2C5_DATA,
|
||||
GPI_SYS_I2C5_DATA)>;
|
||||
bias-disable; /* external pull-up */
|
||||
input-enable;
|
||||
input-schmitt-enable;
|
||||
};
|
||||
};
|
||||
|
||||
i2c6_pins: i2c6-0 {
|
||||
i2c-pins {
|
||||
pinmux = <GPIOMUX(16, GPOUT_LOW,
|
||||
GPOEN_SYS_I2C6_CLK,
|
||||
GPI_SYS_I2C6_CLK)>,
|
||||
<GPIOMUX(17, GPOUT_LOW,
|
||||
GPOEN_SYS_I2C6_DATA,
|
||||
GPI_SYS_I2C6_DATA)>;
|
||||
bias-disable; /* external pull-up */
|
||||
input-enable;
|
||||
input-schmitt-enable;
|
||||
};
|
||||
};
|
||||
|
||||
i2srx_pins: i2srx-0 {
|
||||
clk-sd-pins {
|
||||
pinmux = <GPIOMUX(38, GPOUT_LOW,
|
||||
GPOEN_DISABLE,
|
||||
GPI_SYS_I2SRX_BCLK)>,
|
||||
<GPIOMUX(63, GPOUT_LOW,
|
||||
GPOEN_DISABLE,
|
||||
GPI_SYS_I2SRX_LRCK)>,
|
||||
<GPIOMUX(38, GPOUT_LOW,
|
||||
GPOEN_DISABLE,
|
||||
GPI_SYS_I2STX1_BCLK)>,
|
||||
<GPIOMUX(63, GPOUT_LOW,
|
||||
GPOEN_DISABLE,
|
||||
GPI_SYS_I2STX1_LRCK)>,
|
||||
<GPIOMUX(61, GPOUT_LOW,
|
||||
GPOEN_DISABLE,
|
||||
GPI_SYS_I2SRX_SDIN0)>;
|
||||
input-enable;
|
||||
};
|
||||
};
|
||||
|
||||
i2stx1_pins: i2stx1-0 {
|
||||
sd-pins {
|
||||
pinmux = <GPIOMUX(44, GPOUT_SYS_I2STX1_SDO0,
|
||||
GPOEN_ENABLE,
|
||||
GPI_NONE)>;
|
||||
bias-disable;
|
||||
input-disable;
|
||||
};
|
||||
};
|
||||
|
||||
mclk_ext_pins: mclk-ext-0 {
|
||||
mclk-ext-pins {
|
||||
pinmux = <GPIOMUX(4, GPOUT_LOW,
|
||||
GPOEN_DISABLE,
|
||||
GPI_SYS_MCLK_EXT)>;
|
||||
input-enable;
|
||||
};
|
||||
};
|
||||
|
||||
mmc0_pins: mmc0-0 {
|
||||
rst-pins {
|
||||
pinmux = <GPIOMUX(62, GPOUT_SYS_SDIO0_RST,
|
||||
GPOEN_ENABLE,
|
||||
GPI_NONE)>;
|
||||
bias-pull-up;
|
||||
drive-strength = <12>;
|
||||
input-disable;
|
||||
input-schmitt-disable;
|
||||
slew-rate = <0>;
|
||||
};
|
||||
|
||||
mmc-pins {
|
||||
pinmux = <PINMUX(64, 0)>,
|
||||
<PINMUX(65, 0)>,
|
||||
<PINMUX(66, 0)>,
|
||||
<PINMUX(67, 0)>,
|
||||
<PINMUX(68, 0)>,
|
||||
<PINMUX(69, 0)>,
|
||||
<PINMUX(70, 0)>,
|
||||
<PINMUX(71, 0)>,
|
||||
<PINMUX(72, 0)>,
|
||||
<PINMUX(73, 0)>;
|
||||
bias-pull-up;
|
||||
drive-strength = <12>;
|
||||
input-enable;
|
||||
};
|
||||
};
|
||||
|
||||
mmc1_pins: mmc1-0 {
|
||||
clk-pins {
|
||||
pinmux = <GPIOMUX(10, GPOUT_SYS_SDIO1_CLK,
|
||||
GPOEN_ENABLE,
|
||||
GPI_NONE)>;
|
||||
bias-pull-up;
|
||||
drive-strength = <12>;
|
||||
input-disable;
|
||||
input-schmitt-disable;
|
||||
slew-rate = <0>;
|
||||
};
|
||||
|
||||
mmc-pins {
|
||||
pinmux = <GPIOMUX(9, GPOUT_SYS_SDIO1_CMD,
|
||||
GPOEN_SYS_SDIO1_CMD,
|
||||
GPI_SYS_SDIO1_CMD)>,
|
||||
<GPIOMUX(11, GPOUT_SYS_SDIO1_DATA0,
|
||||
GPOEN_SYS_SDIO1_DATA0,
|
||||
GPI_SYS_SDIO1_DATA0)>,
|
||||
<GPIOMUX(12, GPOUT_SYS_SDIO1_DATA1,
|
||||
GPOEN_SYS_SDIO1_DATA1,
|
||||
GPI_SYS_SDIO1_DATA1)>,
|
||||
<GPIOMUX(7, GPOUT_SYS_SDIO1_DATA2,
|
||||
GPOEN_SYS_SDIO1_DATA2,
|
||||
GPI_SYS_SDIO1_DATA2)>,
|
||||
<GPIOMUX(8, GPOUT_SYS_SDIO1_DATA3,
|
||||
GPOEN_SYS_SDIO1_DATA3,
|
||||
GPI_SYS_SDIO1_DATA3)>;
|
||||
bias-pull-up;
|
||||
drive-strength = <12>;
|
||||
input-enable;
|
||||
input-schmitt-enable;
|
||||
slew-rate = <0>;
|
||||
};
|
||||
};
|
||||
|
||||
pwmdac_pins: pwmdac-0 {
|
||||
pwmdac-pins {
|
||||
pinmux = <GPIOMUX(33, GPOUT_SYS_PWMDAC_LEFT,
|
||||
GPOEN_ENABLE,
|
||||
GPI_NONE)>,
|
||||
<GPIOMUX(34, GPOUT_SYS_PWMDAC_RIGHT,
|
||||
GPOEN_ENABLE,
|
||||
GPI_NONE)>;
|
||||
bias-disable;
|
||||
drive-strength = <2>;
|
||||
input-disable;
|
||||
input-schmitt-disable;
|
||||
slew-rate = <0>;
|
||||
};
|
||||
};
|
||||
|
||||
pwm_pins: pwm-0 {
|
||||
pwm-pins {
|
||||
pinmux = <GPIOMUX(46, GPOUT_SYS_PWM_CHANNEL0,
|
||||
GPOEN_SYS_PWM0_CHANNEL0,
|
||||
GPI_NONE)>,
|
||||
<GPIOMUX(59, GPOUT_SYS_PWM_CHANNEL1,
|
||||
GPOEN_SYS_PWM0_CHANNEL1,
|
||||
GPI_NONE)>;
|
||||
bias-disable;
|
||||
drive-strength = <12>;
|
||||
input-disable;
|
||||
input-schmitt-disable;
|
||||
slew-rate = <0>;
|
||||
};
|
||||
};
|
||||
|
||||
spi0_pins: spi0-0 {
|
||||
mosi-pins {
|
||||
pinmux = <GPIOMUX(52, GPOUT_SYS_SPI0_TXD,
|
||||
GPOEN_ENABLE,
|
||||
GPI_NONE)>;
|
||||
bias-disable;
|
||||
input-disable;
|
||||
input-schmitt-disable;
|
||||
};
|
||||
|
||||
miso-pins {
|
||||
pinmux = <GPIOMUX(53, GPOUT_LOW,
|
||||
GPOEN_DISABLE,
|
||||
GPI_SYS_SPI0_RXD)>;
|
||||
bias-pull-up;
|
||||
input-enable;
|
||||
input-schmitt-enable;
|
||||
};
|
||||
|
||||
sck-pins {
|
||||
pinmux = <GPIOMUX(48, GPOUT_SYS_SPI0_CLK,
|
||||
GPOEN_ENABLE,
|
||||
GPI_SYS_SPI0_CLK)>;
|
||||
bias-disable;
|
||||
input-disable;
|
||||
input-schmitt-disable;
|
||||
};
|
||||
|
||||
ss-pins {
|
||||
pinmux = <GPIOMUX(49, GPOUT_SYS_SPI0_FSS,
|
||||
GPOEN_ENABLE,
|
||||
GPI_SYS_SPI0_FSS)>;
|
||||
bias-disable;
|
||||
input-disable;
|
||||
input-schmitt-disable;
|
||||
};
|
||||
};
|
||||
|
||||
tdm_pins: tdm-0 {
|
||||
tx-pins {
|
||||
pinmux = <GPIOMUX(44, GPOUT_SYS_TDM_TXD,
|
||||
GPOEN_ENABLE,
|
||||
GPI_NONE)>;
|
||||
bias-pull-up;
|
||||
drive-strength = <2>;
|
||||
input-disable;
|
||||
input-schmitt-disable;
|
||||
slew-rate = <0>;
|
||||
};
|
||||
|
||||
rx-pins {
|
||||
pinmux = <GPIOMUX(61, GPOUT_HIGH,
|
||||
GPOEN_DISABLE,
|
||||
GPI_SYS_TDM_RXD)>;
|
||||
input-enable;
|
||||
};
|
||||
|
||||
sync-pins {
|
||||
pinmux = <GPIOMUX(63, GPOUT_HIGH,
|
||||
GPOEN_DISABLE,
|
||||
GPI_SYS_TDM_SYNC)>;
|
||||
input-enable;
|
||||
};
|
||||
|
||||
pcmclk-pins {
|
||||
pinmux = <GPIOMUX(38, GPOUT_HIGH,
|
||||
GPOEN_DISABLE,
|
||||
GPI_SYS_TDM_CLK)>;
|
||||
input-enable;
|
||||
};
|
||||
};
|
||||
|
||||
uart0_pins: uart0-0 {
|
||||
tx-pins {
|
||||
pinmux = <GPIOMUX(5, GPOUT_SYS_UART0_TX,
|
||||
GPOEN_ENABLE,
|
||||
GPI_NONE)>;
|
||||
bias-disable;
|
||||
drive-strength = <12>;
|
||||
input-disable;
|
||||
input-schmitt-disable;
|
||||
slew-rate = <0>;
|
||||
};
|
||||
|
||||
rx-pins {
|
||||
pinmux = <GPIOMUX(6, GPOUT_LOW,
|
||||
GPOEN_DISABLE,
|
||||
GPI_SYS_UART0_RX)>;
|
||||
bias-disable; /* external pull-up */
|
||||
drive-strength = <2>;
|
||||
input-enable;
|
||||
input-schmitt-enable;
|
||||
slew-rate = <0>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&tdm {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&tdm_pins>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&uart0 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&uart0_pins>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usb0 {
|
||||
dr_mode = "peripheral";
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&U74_1 {
|
||||
cpu-supply = <&vdd_cpu>;
|
||||
};
|
||||
|
||||
&U74_2 {
|
||||
cpu-supply = <&vdd_cpu>;
|
||||
};
|
||||
|
||||
&U74_3 {
|
||||
cpu-supply = <&vdd_cpu>;
|
||||
};
|
||||
|
||||
&U74_4 {
|
||||
cpu-supply = <&vdd_cpu>;
|
||||
};
|
||||
|
||||
@ -15,7 +15,7 @@ / {
|
||||
#address-cells = <2>;
|
||||
#size-cells = <2>;
|
||||
|
||||
cpus {
|
||||
cpus: cpus {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
|
||||
@ -193,6 +193,33 @@ uart0: serial@ffe7014000 {
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
emmc: mmc@ffe7080000 {
|
||||
compatible = "thead,th1520-dwcmshc";
|
||||
reg = <0xff 0xe7080000 0x0 0x10000>;
|
||||
interrupts = <62 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&sdhci_clk>;
|
||||
clock-names = "core";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
sdio0: mmc@ffe7090000 {
|
||||
compatible = "thead,th1520-dwcmshc";
|
||||
reg = <0xff 0xe7090000 0x0 0x10000>;
|
||||
interrupts = <64 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&sdhci_clk>;
|
||||
clock-names = "core";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
sdio1: mmc@ffe70a0000 {
|
||||
compatible = "thead,th1520-dwcmshc";
|
||||
reg = <0xff 0xe70a0000 0x0 0x10000>;
|
||||
interrupts = <71 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&sdhci_clk>;
|
||||
clock-names = "core";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
uart1: serial@ffe7f00000 {
|
||||
compatible = "snps,dw-apb-uart";
|
||||
reg = <0xff 0xe7f00000 0x0 0x100>;
|
||||
@ -311,33 +338,6 @@ dmac0: dma-controller@ffefc00000 {
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
emmc: mmc@ffe7080000 {
|
||||
compatible = "thead,th1520-dwcmshc";
|
||||
reg = <0xff 0xe7080000 0x0 0x10000>;
|
||||
interrupts = <62 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&sdhci_clk>;
|
||||
clock-names = "core";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
sdio0: mmc@ffe7090000 {
|
||||
compatible = "thead,th1520-dwcmshc";
|
||||
reg = <0xff 0xe7090000 0x0 0x10000>;
|
||||
interrupts = <64 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&sdhci_clk>;
|
||||
clock-names = "core";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
sdio1: mmc@ffe70a0000 {
|
||||
compatible = "thead,th1520-dwcmshc";
|
||||
reg = <0xff 0xe70a0000 0x0 0x10000>;
|
||||
interrupts = <71 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&sdhci_clk>;
|
||||
clock-names = "core";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
timer0: timer@ffefc32000 {
|
||||
compatible = "snps,dw-apb-timer";
|
||||
reg = <0xff 0xefc32000 0x0 0x14>;
|
||||
|
||||
Loading…
Reference in New Issue
Block a user