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gpio/mxs: convert gpio-mxs to use basic_mmio_gpio library
The gpio-mxs controller complies with basic_mmio_gpio library. This patch converts the driver to use the library. Signed-off-by: Shawn Guo <shawn.guo@linaro.org> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
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e4ea933363
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06f88a8ae9
@ -101,6 +101,7 @@ config GPIO_MXC
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config GPIO_MXS
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def_bool y
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depends on ARCH_MXS
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select GPIO_GENERIC
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config GPIO_PLAT_SAMSUNG
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def_bool y
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@ -27,6 +27,7 @@
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#include <linux/gpio.h>
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#include <linux/platform_device.h>
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#include <linux/slab.h>
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#include <linux/basic_mmio_gpio.h>
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#include <mach/mxs.h>
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#define MXS_SET 0x4
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@ -54,7 +55,7 @@ struct mxs_gpio_port {
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int irq;
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int irq_high;
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int virtual_irq_start;
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struct gpio_chip chip;
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struct bgpio_chip bgc;
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};
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/* Note: This driver assumes 32 GPIOs are handled in one register */
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@ -99,8 +100,6 @@ static void mxs_gpio_unmask_irq(struct irq_data *d)
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set_gpio_irqenable(port, gpio & 0x1f, 1);
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}
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static int mxs_gpio_get(struct gpio_chip *chip, unsigned offset);
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static int mxs_gpio_set_irq_type(struct irq_data *d, unsigned int type)
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{
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u32 gpio = irq_to_gpio(d->irq);
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@ -203,61 +202,15 @@ static struct irq_chip gpio_irq_chip = {
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.irq_set_wake = mxs_gpio_set_wake_irq,
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};
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static void mxs_set_gpio_direction(struct gpio_chip *chip, unsigned offset,
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int dir)
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static int mxs_gpio_to_irq(struct gpio_chip *gc, unsigned offset)
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{
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struct bgpio_chip *bgc = to_bgpio_chip(gc);
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struct mxs_gpio_port *port =
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container_of(chip, struct mxs_gpio_port, chip);
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void __iomem *pin_addr = port->base + PINCTRL_DOE(port->id);
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if (dir)
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writel(1 << offset, pin_addr + MXS_SET);
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else
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writel(1 << offset, pin_addr + MXS_CLR);
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}
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static int mxs_gpio_get(struct gpio_chip *chip, unsigned offset)
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{
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struct mxs_gpio_port *port =
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container_of(chip, struct mxs_gpio_port, chip);
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return (readl(port->base + PINCTRL_DIN(port->id)) >> offset) & 1;
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}
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static void mxs_gpio_set(struct gpio_chip *chip, unsigned offset, int value)
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{
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struct mxs_gpio_port *port =
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container_of(chip, struct mxs_gpio_port, chip);
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void __iomem *pin_addr = port->base + PINCTRL_DOUT(port->id);
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if (value)
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writel(1 << offset, pin_addr + MXS_SET);
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else
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writel(1 << offset, pin_addr + MXS_CLR);
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}
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static int mxs_gpio_to_irq(struct gpio_chip *chip, unsigned offset)
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{
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struct mxs_gpio_port *port =
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container_of(chip, struct mxs_gpio_port, chip);
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container_of(bgc, struct mxs_gpio_port, bgc);
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return port->virtual_irq_start + offset;
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}
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static int mxs_gpio_direction_input(struct gpio_chip *chip, unsigned offset)
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{
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mxs_set_gpio_direction(chip, offset, 0);
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return 0;
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}
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static int mxs_gpio_direction_output(struct gpio_chip *chip,
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unsigned offset, int value)
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{
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mxs_gpio_set(chip, offset, value);
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mxs_set_gpio_direction(chip, offset, 1);
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return 0;
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}
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static int __devinit mxs_gpio_probe(struct platform_device *pdev)
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{
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static void __iomem *base;
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@ -322,21 +275,24 @@ static int __devinit mxs_gpio_probe(struct platform_device *pdev)
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irq_set_chained_handler(port->irq, mxs_gpio_irq_handler);
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irq_set_handler_data(port->irq, port);
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/* register gpio chip */
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port->chip.direction_input = mxs_gpio_direction_input;
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port->chip.direction_output = mxs_gpio_direction_output;
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port->chip.get = mxs_gpio_get;
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port->chip.set = mxs_gpio_set;
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port->chip.to_irq = mxs_gpio_to_irq;
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port->chip.base = port->id * 32;
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port->chip.ngpio = 32;
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err = gpiochip_add(&port->chip);
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err = bgpio_init(&port->bgc, &pdev->dev, 4,
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port->base + PINCTRL_DIN(port->id),
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port->base + PINCTRL_DOUT(port->id), NULL,
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port->base + PINCTRL_DOE(port->id), NULL, false);
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if (err)
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goto out_iounmap;
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port->bgc.gc.to_irq = mxs_gpio_to_irq;
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port->bgc.gc.base = port->id * 32;
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err = gpiochip_add(&port->bgc.gc);
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if (err)
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goto out_bgpio_remove;
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return 0;
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out_bgpio_remove:
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bgpio_remove(&port->bgc);
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out_iounmap:
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if (iores)
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iounmap(port->base);
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