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PCI: quirk to disable e100 interrupt if RESET failed to
Without this quirk, e100 can be pulling on a shared interrupt line when another device (eg. USB) loads, causing the interrupt to scream and get disabled. http://bugzilla.kernel.org/show_bug.cgi?id=5918 Signed-off-by: Bjorn Helgaas <bjorn.helgaas@hp.com> Signed-off-by: Len Brown <len.brown@intel.com>
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@ -1511,6 +1511,63 @@ static void __devinit quirk_netmos(struct pci_dev *dev)
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}
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}
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DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_NETMOS, PCI_ANY_ID, quirk_netmos);
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DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_NETMOS, PCI_ANY_ID, quirk_netmos);
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static void __devinit quirk_e100_interrupt(struct pci_dev *dev)
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{
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u16 command;
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u32 bar;
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u8 __iomem *csr;
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u8 cmd_hi;
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switch (dev->device) {
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/* PCI IDs taken from drivers/net/e100.c */
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case 0x1029:
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case 0x1030 ... 0x1034:
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case 0x1038 ... 0x103E:
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case 0x1050 ... 0x1057:
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case 0x1059:
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case 0x1064 ... 0x106B:
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case 0x1091 ... 0x1095:
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case 0x1209:
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case 0x1229:
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case 0x2449:
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case 0x2459:
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case 0x245D:
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case 0x27DC:
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break;
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default:
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return;
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}
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/*
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* Some firmware hands off the e100 with interrupts enabled,
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* which can cause a flood of interrupts if packets are
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* received before the driver attaches to the device. So
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* disable all e100 interrupts here. The driver will
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* re-enable them when it's ready.
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*/
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pci_read_config_word(dev, PCI_COMMAND, &command);
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pci_read_config_dword(dev, PCI_BASE_ADDRESS_0, &bar);
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if (!(command & PCI_COMMAND_MEMORY) || !bar)
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return;
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csr = ioremap(bar, 8);
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if (!csr) {
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printk(KERN_WARNING "PCI: Can't map %s e100 registers\n",
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pci_name(dev));
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return;
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}
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cmd_hi = readb(csr + 3);
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if (cmd_hi == 0) {
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printk(KERN_WARNING "PCI: Firmware left %s e100 interrupts "
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"enabled, disabling\n", pci_name(dev));
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writeb(1, csr + 3);
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}
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iounmap(csr);
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}
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DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_INTEL, PCI_ANY_ID, quirk_e100_interrupt);
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static void __devinit fixup_rev1_53c810(struct pci_dev* dev)
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static void __devinit fixup_rev1_53c810(struct pci_dev* dev)
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{
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{
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