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[PPC] 8xx: swap bug-fix

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This makes swap routines operate correctly on the ppc_8xx based machines.

Recent kernel's size makes swap feature very important on low-memory platfor
those are actually non-operable without it.

Signed-off-by: Yuri Tikhonov <yur@emcraft.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
This commit is contained in:
Yuri Tikhonov 2008-02-02 10:47:31 +03:00 committed by Kumar Gala
parent 3e0d65bf6d
commit 1757f2d12d
2 changed files with 29 additions and 9 deletions
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30
arch/ppc/kernel/head_8xx.S
View File

@ -329,8 +329,18 @@ InstructionTLBMiss:
mfspr r11, SPRN_MD_TWC /* ....and get the pte address */ mfspr r11, SPRN_MD_TWC /* ....and get the pte address */
lwz r10, 0(r11) /* Get the pte */ lwz r10, 0(r11) /* Get the pte */
#ifdef CONFIG_SWAP
/* do not set the _PAGE_ACCESSED bit of a non-present page */
andi. r11, r10, _PAGE_PRESENT
beq 4f
ori r10, r10, _PAGE_ACCESSED
mfspr r11, SPRN_MD_TWC /* get the pte address again */
stw r10, 0(r11)
4:
#else
ori r10, r10, _PAGE_ACCESSED ori r10, r10, _PAGE_ACCESSED
stw r10, 0(r11) stw r10, 0(r11)
#endif
/* The Linux PTE won't go exactly into the MMU TLB. /* The Linux PTE won't go exactly into the MMU TLB.
* Software indicator bits 21, 22 and 28 must be clear. * Software indicator bits 21, 22 and 28 must be clear.
@ -395,8 +405,17 @@ DataStoreTLBMiss:
DO_8xx_CPU6(0x3b80, r3) DO_8xx_CPU6(0x3b80, r3)
mtspr SPRN_MD_TWC, r11 mtspr SPRN_MD_TWC, r11
mfspr r11, SPRN_MD_TWC /* get the pte address again */ #ifdef CONFIG_SWAP
/* do not set the _PAGE_ACCESSED bit of a non-present page */
andi. r11, r10, _PAGE_PRESENT
beq 4f
ori r10, r10, _PAGE_ACCESSED ori r10, r10, _PAGE_ACCESSED
4:
/* and update pte in table */
#else
ori r10, r10, _PAGE_ACCESSED
#endif
mfspr r11, SPRN_MD_TWC /* get the pte address again */
stw r10, 0(r11) stw r10, 0(r11)
/* The Linux PTE won't go exactly into the MMU TLB. /* The Linux PTE won't go exactly into the MMU TLB.
@ -575,7 +594,16 @@ DataTLBError:
/* Update 'changed', among others. /* Update 'changed', among others.
*/ */
#ifdef CONFIG_SWAP
ori r10, r10, _PAGE_DIRTY|_PAGE_HWWRITE
/* do not set the _PAGE_ACCESSED bit of a non-present page */
andi. r11, r10, _PAGE_PRESENT
beq 4f
ori r10, r10, _PAGE_ACCESSED
4:
#else
ori r10, r10, _PAGE_DIRTY|_PAGE_ACCESSED|_PAGE_HWWRITE ori r10, r10, _PAGE_DIRTY|_PAGE_ACCESSED|_PAGE_HWWRITE
#endif
mfspr r11, SPRN_MD_TWC /* Get pte address again */ mfspr r11, SPRN_MD_TWC /* Get pte address again */
stw r10, 0(r11) /* and update pte in table */ stw r10, 0(r11) /* and update pte in table */

8
include/asm-ppc/pgtable.h
View File

@ -299,14 +299,6 @@ extern unsigned long ioremap_bot, ioremap_base;
#define _PMD_PAGE_MASK 0x000c #define _PMD_PAGE_MASK 0x000c
#define _PMD_PAGE_8M 0x000c #define _PMD_PAGE_8M 0x000c
/*
* The 8xx TLB miss handler allegedly sets _PAGE_ACCESSED in the PTE
* for an address even if _PAGE_PRESENT is not set, as a performance
* optimization. This is a bug if you ever want to use swap unless
* _PAGE_ACCESSED is 2, which it isn't, or unless you have 8xx-specific
* definitions for __swp_entry etc. below, which would be gross.
* -- paulus
*/
#define _PTE_NONE_MASK _PAGE_ACCESSED #define _PTE_NONE_MASK _PAGE_ACCESSED
#else /* CONFIG_6xx */ #else /* CONFIG_6xx */