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Documentation: devicetree: Add ECC information to synopsys ddr controller

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Add ECC information to synopsys ddr memory controller.

Signed-off-by: Punnaiah Choudary Kalluri <punnaia@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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Punnaiah Choudary Kalluri 2014-11-27 20:47:33 +05:30 committed by Michal Simek
parent 6835fe4846
commit 1837649fd3
1 changed files with 4 additions and 0 deletions
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4
Documentation/devicetree/bindings/memory-controllers/synopsys.txt
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@ -1,5 +1,9 @@
Binding for Synopsys IntelliDDR Multi Protocol Memory Controller
This controller has an optional ECC support in half-bus width (16-bit)
configuration. The ECC controller corrects one bit error and detects
two bit errors.
Required properties:
- compatible: Should be 'xlnx,zynq-ddrc-a05'
- reg: Base address and size of the controllers memory area