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arm: dts: mediatek: Update mt7629 dts to reflect the latest dt-binding

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* Removes mediatek,physpeed property from dtsi that is useless in PHYLINK
* Use the fixed-link property speed = <2500> to set the phy in 2.5Gbit.
* Set gmac1 to gmii mode that connect to a internal gphy

Signed-off-by: MarkLee <Mark-MC.Lee@mediatek.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
MarkLee 2019-10-14 15:15:18 +08:00 committed by David S. Miller
parent 4e3eff5bea
commit 2618500dd3
2 changed files with 12 additions and 3 deletions
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13
arch/arm/boot/dts/mt7629-rfb.dts
View File

@ -66,9 +66,21 @@
pinctrl-1 = <&ephy_leds_pins>; pinctrl-1 = <&ephy_leds_pins>;
status = "okay"; status = "okay";
gmac0: mac@0 {
compatible = "mediatek,eth-mac";
reg = <0>;
phy-mode = "2500base-x";
fixed-link {
speed = <2500>;
full-duplex;
pause;
};
};
gmac1: mac@1 { gmac1: mac@1 {
compatible = "mediatek,eth-mac"; compatible = "mediatek,eth-mac";
reg = <1>; reg = <1>;
phy-mode = "gmii";
phy-handle = <&phy0>; phy-handle = <&phy0>;
}; };
@ -78,7 +90,6 @@
phy0: ethernet-phy@0 { phy0: ethernet-phy@0 {
reg = <0>; reg = <0>;
phy-mode = "gmii";
}; };
}; };
}; };

2
arch/arm/boot/dts/mt7629.dtsi
View File

@ -468,14 +468,12 @@
compatible = "mediatek,mt7629-sgmiisys", "syscon"; compatible = "mediatek,mt7629-sgmiisys", "syscon";
reg = <0x1b128000 0x3000>; reg = <0x1b128000 0x3000>;
#clock-cells = <1>; #clock-cells = <1>;
mediatek,physpeed = "2500";
}; };
sgmiisys1: syscon@1b130000 { sgmiisys1: syscon@1b130000 {
compatible = "mediatek,mt7629-sgmiisys", "syscon"; compatible = "mediatek,mt7629-sgmiisys", "syscon";
reg = <0x1b130000 0x3000>; reg = <0x1b130000 0x3000>;
#clock-cells = <1>; #clock-cells = <1>;
mediatek,physpeed = "2500";
}; };
}; };
}; };