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irqchip: Replace setup_irq() by request_irq()
request_irq() is preferred over setup_irq(). Invocations of setup_irq() occur after memory allocators are ready. Per tglx[1], setup_irq() existed in olden days when allocators were not ready by the time early interrupts were initialized. Hence replace setup_irq() by request_irq(). [1] https://lkml.kernel.org/r/alpine.DEB.2.20.1710191609480.1971@nanos Signed-off-by: afzal mohammed <afzal.mohd.ma@gmail.com> Signed-off-by: Marc Zyngier <maz@kernel.org> Link: https://lore.kernel.org/r/20200304004839.4729-1-afzal.mohd.ma@gmail.com
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@ -268,15 +268,6 @@ static void init_8259A(int auto_eoi)
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raw_spin_unlock_irqrestore(&i8259A_lock, flags);
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raw_spin_unlock_irqrestore(&i8259A_lock, flags);
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}
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}
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/*
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* IRQ2 is cascade interrupt to second interrupt controller
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*/
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static struct irqaction irq2 = {
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.handler = no_action,
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.name = "cascade",
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.flags = IRQF_NO_THREAD,
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};
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static struct resource pic1_io_resource = {
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static struct resource pic1_io_resource = {
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.name = "pic1",
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.name = "pic1",
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.start = PIC_MASTER_CMD,
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.start = PIC_MASTER_CMD,
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@ -311,6 +302,10 @@ static const struct irq_domain_ops i8259A_ops = {
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*/
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*/
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struct irq_domain * __init __init_i8259_irqs(struct device_node *node)
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struct irq_domain * __init __init_i8259_irqs(struct device_node *node)
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{
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{
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/*
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* PIC_CASCADE_IR is cascade interrupt to second interrupt controller
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*/
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int irq = I8259A_IRQ_BASE + PIC_CASCADE_IR;
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struct irq_domain *domain;
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struct irq_domain *domain;
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insert_resource(&ioport_resource, &pic1_io_resource);
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insert_resource(&ioport_resource, &pic1_io_resource);
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@ -323,7 +318,8 @@ struct irq_domain * __init __init_i8259_irqs(struct device_node *node)
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if (!domain)
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if (!domain)
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panic("Failed to add i8259 IRQ domain");
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panic("Failed to add i8259 IRQ domain");
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setup_irq(I8259A_IRQ_BASE + PIC_CASCADE_IR, &irq2);
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if (request_irq(irq, no_action, IRQF_NO_THREAD, "cascade", NULL))
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pr_err("Failed to register cascade interrupt\n");
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register_syscore_ops(&i8259_syscore_ops);
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register_syscore_ops(&i8259_syscore_ops);
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return domain;
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return domain;
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}
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}
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@ -58,11 +58,6 @@ static irqreturn_t intc_cascade(int irq, void *data)
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return IRQ_HANDLED;
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return IRQ_HANDLED;
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}
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}
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static struct irqaction intc_cascade_action = {
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.handler = intc_cascade,
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.name = "SoC intc cascade interrupt",
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};
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static int __init ingenic_intc_of_init(struct device_node *node,
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static int __init ingenic_intc_of_init(struct device_node *node,
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unsigned num_chips)
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unsigned num_chips)
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{
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{
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@ -130,7 +125,9 @@ static int __init ingenic_intc_of_init(struct device_node *node,
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irq_reg_writel(gc, IRQ_MSK(32), JZ_REG_INTC_SET_MASK);
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irq_reg_writel(gc, IRQ_MSK(32), JZ_REG_INTC_SET_MASK);
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}
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}
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setup_irq(parent_irq, &intc_cascade_action);
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if (request_irq(parent_irq, intc_cascade, 0,
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"SoC intc cascade interrupt", NULL))
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pr_err("Failed to register SoC intc cascade interrupt\n");
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return 0;
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return 0;
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out_domain_remove:
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out_domain_remove:
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