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netx: add support for clockevents
This is based on a patch by Luotao Fu <lfu@pengutronix.de> Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Acked-by: Luotao Fu <lfu@pengutronix.de> Acked-by: Sascha Hauer <s.hauer@pengutronix.de>
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@ -287,6 +287,7 @@ config ARCH_FOOTBRIDGE
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config ARCH_NETX
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config ARCH_NETX
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bool "Hilscher NetX based"
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bool "Hilscher NetX based"
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select ARM_VIC
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select ARM_VIC
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select GENERIC_CLOCKEVENTS
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select GENERIC_TIME
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select GENERIC_TIME
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help
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help
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This enables support for systems based on the Hilscher NetX Soc
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This enables support for systems based on the Hilscher NetX Soc
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@ -21,25 +21,80 @@
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#include <linux/interrupt.h>
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#include <linux/interrupt.h>
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#include <linux/irq.h>
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#include <linux/irq.h>
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#include <linux/clocksource.h>
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#include <linux/clocksource.h>
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#include <linux/clockchips.h>
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#include <linux/io.h>
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#include <linux/io.h>
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#include <mach/hardware.h>
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#include <mach/hardware.h>
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#include <asm/mach/time.h>
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#include <asm/mach/time.h>
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#include <mach/netx-regs.h>
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#include <mach/netx-regs.h>
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#define TIMER_CLOCKEVENT 0
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#define TIMER_CLOCKSOURCE 1
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#define TIMER_CLOCKSOURCE 1
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static void netx_set_mode(enum clock_event_mode mode,
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struct clock_event_device *clk)
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{
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u32 tmode;
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/* disable timer */
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writel(0, NETX_GPIO_COUNTER_CTRL(TIMER_CLOCKEVENT));
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switch (mode) {
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case CLOCK_EVT_MODE_PERIODIC:
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writel(LATCH, NETX_GPIO_COUNTER_MAX(TIMER_CLOCKEVENT));
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tmode = NETX_GPIO_COUNTER_CTRL_RST_EN |
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NETX_GPIO_COUNTER_CTRL_IRQ_EN |
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NETX_GPIO_COUNTER_CTRL_RUN;
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break;
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case CLOCK_EVT_MODE_ONESHOT:
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writel(0, NETX_GPIO_COUNTER_MAX(TIMER_CLOCKEVENT));
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tmode = NETX_GPIO_COUNTER_CTRL_IRQ_EN |
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NETX_GPIO_COUNTER_CTRL_RUN;
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break;
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default:
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WARN(1, "%s: unhandled mode %d\n", __func__, mode);
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/* fall through */
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case CLOCK_EVT_MODE_SHUTDOWN:
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case CLOCK_EVT_MODE_UNUSED:
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case CLOCK_EVT_MODE_RESUME:
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tmode = 0;
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break;
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}
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writel(tmode, NETX_GPIO_COUNTER_CTRL(TIMER_CLOCKEVENT));
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}
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static int netx_set_next_event(unsigned long evt,
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struct clock_event_device *clk)
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{
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writel(0 - evt, NETX_GPIO_COUNTER_CURRENT(TIMER_CLOCKEVENT));
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return 0;
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}
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static struct clock_event_device netx_clockevent = {
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.name = "netx-timer" __stringify(TIMER_CLOCKEVENT),
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.shift = 32,
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.features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT,
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.set_next_event = netx_set_next_event,
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.set_mode = netx_set_mode,
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};
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/*
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/*
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* IRQ handler for the timer
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* IRQ handler for the timer
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*/
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*/
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static irqreturn_t
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static irqreturn_t
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netx_timer_interrupt(int irq, void *dev_id)
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netx_timer_interrupt(int irq, void *dev_id)
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{
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{
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timer_tick();
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struct clock_event_device *evt = &netx_clockevent;
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/* acknowledge interrupt */
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/* acknowledge interrupt */
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writel(COUNTER_BIT(0), NETX_GPIO_IRQ);
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writel(COUNTER_BIT(0), NETX_GPIO_IRQ);
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evt->event_handler(evt);
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return IRQ_HANDLED;
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return IRQ_HANDLED;
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}
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}
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@ -99,6 +154,17 @@ static void __init netx_timer_init(void)
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clocksource_netx.mult =
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clocksource_netx.mult =
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clocksource_hz2mult(CLOCK_TICK_RATE, clocksource_netx.shift);
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clocksource_hz2mult(CLOCK_TICK_RATE, clocksource_netx.shift);
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clocksource_register(&clocksource_netx);
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clocksource_register(&clocksource_netx);
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netx_clockevent.mult = div_sc(CLOCK_TICK_RATE, NSEC_PER_SEC,
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netx_clockevent.shift);
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netx_clockevent.max_delta_ns =
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clockevent_delta2ns(0xfffffffe, &netx_clockevent);
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/* with max_delta_ns >= delta2ns(0x800) the system currently runs fine.
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* Adding some safety ... */
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netx_clockevent.min_delta_ns =
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clockevent_delta2ns(0xa00, &netx_clockevent);
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netx_clockevent.cpumask = cpumask_of_cpu(0);
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clockevents_register_device(&netx_clockevent);
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}
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}
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struct sys_timer netx_timer = {
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struct sys_timer netx_timer = {
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