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accel/habanalabs/gaudi2: drain event lacks rd/wr indication
Due to a H/W issue, AXI drain event does not include a read/write indication, hence we remove this print. Signed-off-by: Ofir Bitton <obitton@habana.ai> Reviewed-by: Oded Gabbay <ogabbay@kernel.org> Reviewed-by: Carl Vanderlip <quic_carlv@quicinc.com> Signed-off-by: Oded Gabbay <ogabbay@kernel.org>
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@ -9589,25 +9589,17 @@ static int gaudi2_handle_pcie_p2p_msix(struct hl_device *hdev, u16 event_type)
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static int gaudi2_handle_pcie_drain(struct hl_device *hdev,
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struct hl_eq_pcie_drain_ind_data *drain_data)
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{
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u64 lbw_rd, lbw_wr, hbw_rd, hbw_wr, cause, error_count = 0;
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u64 cause, error_count = 0;
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cause = le64_to_cpu(drain_data->intr_cause.intr_cause_data);
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lbw_rd = le64_to_cpu(drain_data->drain_rd_addr_lbw);
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lbw_wr = le64_to_cpu(drain_data->drain_wr_addr_lbw);
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hbw_rd = le64_to_cpu(drain_data->drain_rd_addr_hbw);
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hbw_wr = le64_to_cpu(drain_data->drain_wr_addr_hbw);
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if (cause & BIT_ULL(0)) {
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dev_err_ratelimited(hdev->dev,
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"PCIE AXI drain LBW completed, read_err %u, write_err %u\n",
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!!lbw_rd, !!lbw_wr);
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dev_err_ratelimited(hdev->dev, "PCIE AXI drain LBW completed\n");
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error_count++;
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}
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if (cause & BIT_ULL(1)) {
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dev_err_ratelimited(hdev->dev,
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"PCIE AXI drain HBW completed, raddr %#llx, waddr %#llx\n",
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hbw_rd, hbw_wr);
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dev_err_ratelimited(hdev->dev, "PCIE AXI drain HBW completed\n");
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error_count++;
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}
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