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scc_pata.c: do setup itself instead of ide_setup_pci_device()
scc_pata has the different BAR configuration and using ide_setup_pci_device() is inappropriate. (ide_setup_pci_device() expects a normal PCI IDE controller with BAR0..BAR3 either non-existant or being primary/secondary port bases in I/O space.) This patch do all needed setup itself instead of calling ide_setup_pci_device(). [bart: minor checkpatch.pl fixes] Signed-off-by: Kou Ishizaki <kou.ishizaki@toshiba.co.jp> Signed-off-by: Akira Iguchi <akira2.iguchi@toshiba.co.jp> Cc: Sergei Shtylyov <sshtylyov@ru.mvista.com> Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
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parent
e6bfa38a48
commit
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@ -523,6 +523,43 @@ static int setup_mmio_scc (struct pci_dev *dev, const char *name)
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return -ENOMEM;
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}
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static int scc_ide_setup_pci_device(struct pci_dev *dev,
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const struct ide_port_info *d)
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{
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struct scc_ports *ports = pci_get_drvdata(dev);
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ide_hwif_t *hwif = NULL;
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hw_regs_t hw;
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u8 idx[4] = { 0xff, 0xff, 0xff, 0xff };
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int i;
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for (i = 0; i < MAX_HWIFS; i++) {
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hwif = &ide_hwifs[i];
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if (hwif->chipset == ide_unknown)
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break; /* pick an unused entry */
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}
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if (i == MAX_HWIFS) {
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printk(KERN_ERR "%s: too many IDE interfaces, "
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"no room in table\n", SCC_PATA_NAME);
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return -ENOMEM;
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}
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memset(&hw, 0, sizeof(hw));
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for (i = IDE_DATA_OFFSET; i <= IDE_CONTROL_OFFSET; i++)
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hw.io_ports[i] = ports->dma + 0x20 + i * 4;
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hw.irq = dev->irq;
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hw.dev = &dev->dev;
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hw.chipset = ide_pci;
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ide_init_port_hw(hwif, &hw);
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hwif->dev = &dev->dev;
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hwif->cds = d;
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idx[0] = hwif->index;
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ide_device_add(idx, d);
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return 0;
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}
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/**
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* init_setup_scc - set up an SCC PATA Controller
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* @dev: PCI device
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@ -545,10 +582,13 @@ static int __devinit init_setup_scc(struct pci_dev *dev,
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struct scc_ports *ports;
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int rc;
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rc = pci_enable_device(dev);
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if (rc)
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goto end;
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rc = setup_mmio_scc(dev, d->name);
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if (rc < 0) {
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return rc;
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}
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if (rc < 0)
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goto end;
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ports = pci_get_drvdata(dev);
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ctl_base = ports->ctl;
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@ -583,7 +623,10 @@ static int __devinit init_setup_scc(struct pci_dev *dev,
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out_be32((void*)mode_port, MODE_JCUSFEN);
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out_be32((void*)intmask_port, INTMASK_MSK);
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return ide_setup_pci_device(dev, d);
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rc = scc_ide_setup_pci_device(dev, d);
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end:
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return rc;
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}
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/**
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@ -610,17 +653,6 @@ static void __devinit init_mmio_iops_scc(ide_hwif_t *hwif)
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hwif->OUTSW = scc_ide_outsw;
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hwif->OUTSL = scc_ide_outsl;
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hwif->io_ports[IDE_DATA_OFFSET] = dma_base + 0x20;
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hwif->io_ports[IDE_ERROR_OFFSET] = dma_base + 0x24;
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hwif->io_ports[IDE_NSECTOR_OFFSET] = dma_base + 0x28;
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hwif->io_ports[IDE_SECTOR_OFFSET] = dma_base + 0x2c;
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hwif->io_ports[IDE_LCYL_OFFSET] = dma_base + 0x30;
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hwif->io_ports[IDE_HCYL_OFFSET] = dma_base + 0x34;
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hwif->io_ports[IDE_SELECT_OFFSET] = dma_base + 0x38;
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hwif->io_ports[IDE_STATUS_OFFSET] = dma_base + 0x3c;
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hwif->io_ports[IDE_CONTROL_OFFSET] = dma_base + 0x40;
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hwif->irq = dev->irq;
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hwif->dma_base = dma_base;
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hwif->config_data = ports->ctl;
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hwif->mmio = 1;
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