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https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git
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Merge branch 'fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/vkoul/dmaengine.git
This commit is contained in:
commit
4322e341f7
@ -7,9 +7,9 @@
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#include <linux/bitfield.h>
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#include <linux/bitops.h>
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#include <linux/dmaengine.h>
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#include <linux/dma-mapping.h>
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#include <linux/module.h>
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#include <linux/mod_devicetable.h>
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#include <linux/dma-map-ops.h>
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#include <linux/platform_device.h>
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#include <linux/platform_data/amd_qdma.h>
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#include <linux/regmap.h>
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@ -492,18 +492,9 @@ static int qdma_device_verify(struct qdma_device *qdev)
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static int qdma_device_setup(struct qdma_device *qdev)
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{
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struct device *dev = &qdev->pdev->dev;
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u32 ring_sz = QDMA_DEFAULT_RING_SIZE;
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int ret = 0;
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while (dev && get_dma_ops(dev))
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dev = dev->parent;
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if (!dev) {
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qdma_err(qdev, "dma device not found");
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return -EINVAL;
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}
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set_dma_ops(&qdev->pdev->dev, get_dma_ops(dev));
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ret = qdma_setup_fmap_context(qdev);
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if (ret) {
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qdma_err(qdev, "Failed setup fmap context");
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@ -548,11 +539,12 @@ static void qdma_free_queue_resources(struct dma_chan *chan)
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{
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struct qdma_queue *queue = to_qdma_queue(chan);
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struct qdma_device *qdev = queue->qdev;
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struct device *dev = qdev->dma_dev.dev;
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struct qdma_platdata *pdata;
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qdma_clear_queue_context(queue);
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vchan_free_chan_resources(&queue->vchan);
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dma_free_coherent(dev, queue->ring_size * QDMA_MM_DESC_SIZE,
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pdata = dev_get_platdata(&qdev->pdev->dev);
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dma_free_coherent(pdata->dma_dev, queue->ring_size * QDMA_MM_DESC_SIZE,
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queue->desc_base, queue->dma_desc_base);
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}
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@ -565,6 +557,7 @@ static int qdma_alloc_queue_resources(struct dma_chan *chan)
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struct qdma_queue *queue = to_qdma_queue(chan);
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struct qdma_device *qdev = queue->qdev;
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struct qdma_ctxt_sw_desc desc;
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struct qdma_platdata *pdata;
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size_t size;
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int ret;
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@ -572,8 +565,9 @@ static int qdma_alloc_queue_resources(struct dma_chan *chan)
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if (ret)
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return ret;
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pdata = dev_get_platdata(&qdev->pdev->dev);
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size = queue->ring_size * QDMA_MM_DESC_SIZE;
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queue->desc_base = dma_alloc_coherent(qdev->dma_dev.dev, size,
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queue->desc_base = dma_alloc_coherent(pdata->dma_dev, size,
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&queue->dma_desc_base,
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GFP_KERNEL);
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if (!queue->desc_base) {
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@ -588,7 +582,7 @@ static int qdma_alloc_queue_resources(struct dma_chan *chan)
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if (ret) {
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qdma_err(qdev, "Failed to setup SW desc ctxt for %s",
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chan->name);
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dma_free_coherent(qdev->dma_dev.dev, size, queue->desc_base,
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dma_free_coherent(pdata->dma_dev, size, queue->desc_base,
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queue->dma_desc_base);
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return ret;
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}
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@ -948,8 +942,9 @@ static int qdma_init_error_irq(struct qdma_device *qdev)
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static int qdmam_alloc_qintr_rings(struct qdma_device *qdev)
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{
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u32 ctxt[QDMA_CTXT_REGMAP_LEN];
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struct qdma_platdata *pdata = dev_get_platdata(&qdev->pdev->dev);
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struct device *dev = &qdev->pdev->dev;
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u32 ctxt[QDMA_CTXT_REGMAP_LEN];
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struct qdma_intr_ring *ring;
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struct qdma_ctxt_intr intr_ctxt;
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u32 vector;
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@ -969,7 +964,8 @@ static int qdmam_alloc_qintr_rings(struct qdma_device *qdev)
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ring->msix_id = qdev->err_irq_idx + i + 1;
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ring->ridx = i;
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ring->color = 1;
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ring->base = dmam_alloc_coherent(dev, QDMA_INTR_RING_SIZE,
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ring->base = dmam_alloc_coherent(pdata->dma_dev,
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QDMA_INTR_RING_SIZE,
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&ring->dev_base, GFP_KERNEL);
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if (!ring->base) {
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qdma_err(qdev, "Failed to alloc intr ring %d", i);
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@ -153,6 +153,8 @@ static int admac_alloc_sram_carveout(struct admac_data *ad,
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{
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struct admac_sram *sram;
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int i, ret = 0, nblocks;
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ad->txcache.size = readl_relaxed(ad->base + REG_TX_SRAM_SIZE);
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ad->rxcache.size = readl_relaxed(ad->base + REG_RX_SRAM_SIZE);
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if (dir == DMA_MEM_TO_DEV)
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sram = &ad->txcache;
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@ -912,12 +914,7 @@ static int admac_probe(struct platform_device *pdev)
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goto free_irq;
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}
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ad->txcache.size = readl_relaxed(ad->base + REG_TX_SRAM_SIZE);
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ad->rxcache.size = readl_relaxed(ad->base + REG_RX_SRAM_SIZE);
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dev_info(&pdev->dev, "Audio DMA Controller\n");
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dev_info(&pdev->dev, "imprint %x TX cache %u RX cache %u\n",
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readl_relaxed(ad->base + REG_IMPRINT), ad->txcache.size, ad->rxcache.size);
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return 0;
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@ -1363,6 +1363,8 @@ at_xdmac_prep_dma_memset(struct dma_chan *chan, dma_addr_t dest, int value,
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return NULL;
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desc = at_xdmac_memset_create_desc(chan, atchan, dest, len, value);
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if (!desc)
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return NULL;
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list_add_tail(&desc->desc_node, &desc->descs_list);
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desc->tx_dma_desc.cookie = -EBUSY;
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@ -8,13 +8,15 @@
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static bool dw_dma_acpi_filter(struct dma_chan *chan, void *param)
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{
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struct dw_dma *dw = to_dw_dma(chan->device);
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struct dw_dma_chip_pdata *data = dev_get_drvdata(dw->dma.dev);
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struct acpi_dma_spec *dma_spec = param;
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struct dw_dma_slave slave = {
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.dma_dev = dma_spec->dev,
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.src_id = dma_spec->slave_id,
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.dst_id = dma_spec->slave_id,
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.m_master = 0,
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.p_master = 1,
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.m_master = data->m_master,
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.p_master = data->p_master,
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};
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return dw_dma_filter(chan, &slave);
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@ -51,11 +51,15 @@ struct dw_dma_chip_pdata {
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int (*probe)(struct dw_dma_chip *chip);
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int (*remove)(struct dw_dma_chip *chip);
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struct dw_dma_chip *chip;
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u8 m_master;
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u8 p_master;
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};
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static __maybe_unused const struct dw_dma_chip_pdata dw_dma_chip_pdata = {
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.probe = dw_dma_probe,
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.remove = dw_dma_remove,
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.m_master = 0,
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.p_master = 1,
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};
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static const struct dw_dma_platform_data idma32_pdata = {
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@ -72,6 +76,8 @@ static __maybe_unused const struct dw_dma_chip_pdata idma32_chip_pdata = {
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.pdata = &idma32_pdata,
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.probe = idma32_dma_probe,
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.remove = idma32_dma_remove,
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.m_master = 0,
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.p_master = 0,
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};
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static const struct dw_dma_platform_data xbar_pdata = {
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@ -88,6 +94,8 @@ static __maybe_unused const struct dw_dma_chip_pdata xbar_chip_pdata = {
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.pdata = &xbar_pdata,
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.probe = idma32_dma_probe,
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.remove = idma32_dma_remove,
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.m_master = 0,
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.p_master = 0,
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};
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#endif /* _DMA_DW_INTERNAL_H */
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@ -56,10 +56,10 @@ static int dw_pci_probe(struct pci_dev *pdev, const struct pci_device_id *pid)
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if (ret)
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return ret;
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dw_dma_acpi_controller_register(chip->dw);
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pci_set_drvdata(pdev, data);
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dw_dma_acpi_controller_register(chip->dw);
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return 0;
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}
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@ -31,7 +31,7 @@
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#define LDMA_ASK_VALID BIT(2)
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#define LDMA_START BIT(3) /* DMA start operation */
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#define LDMA_STOP BIT(4) /* DMA stop operation */
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#define LDMA_CONFIG_MASK GENMASK(4, 0) /* DMA controller config bits mask */
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#define LDMA_CONFIG_MASK GENMASK_ULL(4, 0) /* DMA controller config bits mask */
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/* Bitfields in ndesc_addr field of HW descriptor */
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#define LDMA_DESC_EN BIT(0) /*1: The next descriptor is valid */
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DMA_TRANS_NONE,
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};
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/**
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/*
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* Interleaved Transfer Request
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* ----------------------------
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* A chunk is collection of contiguous bytes to be transferred.
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@ -223,7 +223,7 @@ enum sum_check_bits {
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};
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/**
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* enum pq_check_flags - result of async_{xor,pq}_zero_sum operations
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* enum sum_check_flags - result of async_{xor,pq}_zero_sum operations
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* @SUM_CHECK_P_RESULT - 1 if xor zero sum error, 0 otherwise
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* @SUM_CHECK_Q_RESULT - 1 if reed-solomon zero sum error, 0 otherwise
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*/
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@ -286,7 +286,7 @@ typedef struct { DECLARE_BITMAP(bits, DMA_TX_TYPE_END); } dma_cap_mask_t;
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* pointer to the engine's metadata area
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* 4. Read out the metadata from the pointer
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*
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* Note: the two mode is not compatible and clients must use one mode for a
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* Warning: the two modes are not compatible and clients must use one mode for a
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* descriptor.
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*/
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enum dma_desc_metadata_mode {
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@ -594,9 +594,13 @@ struct dma_descriptor_metadata_ops {
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* @phys: physical address of the descriptor
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* @chan: target channel for this operation
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* @tx_submit: accept the descriptor, assign ordered cookie and mark the
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* @desc_free: driver's callback function to free a resusable descriptor
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* after completion
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* descriptor pending. To be pushed on .issue_pending() call
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* @callback: routine to call after this operation is complete
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* @callback_result: error result from a DMA transaction
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* @callback_param: general parameter to pass to the callback routine
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* @unmap: hook for generic DMA unmap data
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* @desc_metadata_mode: core managed metadata mode to protect mixed use of
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* DESC_METADATA_CLIENT or DESC_METADATA_ENGINE. Otherwise
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* DESC_METADATA_NONE
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@ -827,6 +831,9 @@ struct dma_filter {
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* @device_prep_dma_memset: prepares a memset operation
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* @device_prep_dma_memset_sg: prepares a memset operation over a scatter list
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* @device_prep_dma_interrupt: prepares an end of chain interrupt operation
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* @device_prep_peripheral_dma_vec: prepares a scatter-gather DMA transfer,
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* where the address and size of each segment is located in one entry of
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* the dma_vec array.
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* @device_prep_slave_sg: prepares a slave dma operation
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* @device_prep_dma_cyclic: prepare a cyclic dma operation suitable for audio.
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* The function takes a buffer of size buf_len. The callback function will
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* @max_mm_channels: Maximum number of MM DMA channels in each direction
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* @device_map: DMA slave map
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* @irq_index: The index of first IRQ
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* @dma_dev: The device pointer for dma operations
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*/
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struct qdma_platdata {
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u32 max_mm_channels;
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u32 irq_index;
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struct dma_slave_map *device_map;
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struct device *dma_dev;
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};
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#endif /* _PLATDATA_AMD_QDMA_H */
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