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dt-bindings: clock: exynosautov920: add peric1, misc and hsi0/1 clock definitions

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Add peric1, misc and hsi0/1 clock definitions.

- CMU_PERIC1 for USI, IC2 and I3C
- CMU_MISC for MISC, GIC and OTP
- HSI0 for PCIE
- HSI1 for USB and MMC

Signed-off-by: Sunyeal Hong <sunyeal.hong@samsung.com>
Acked-by: Rob Herring (Arm) <robh@kernel.org>
Link: https://lore.kernel.org/r/20241009042110.2379903-2-sunyeal.hong@samsung.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
This commit is contained in:
Sunyeal Hong 2024-10-09 13:21:08 +09:00 committed by Krzysztof Kozlowski
parent 9852d85ec9
commit 440e3dcd7c
1 changed files with 47 additions and 0 deletions
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47
include/dt-bindings/clock/samsung,exynosautov920.h
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@ -160,6 +160,7 @@
#define DOUT_CLKCMU_SNW_NOC 144 #define DOUT_CLKCMU_SNW_NOC 144
#define DOUT_CLKCMU_SSP_NOC 145 #define DOUT_CLKCMU_SSP_NOC 145
#define DOUT_CLKCMU_TAA_NOC 146 #define DOUT_CLKCMU_TAA_NOC 146
#define DOUT_TCXO_DIV2 147
/* CMU_PERIC0 */ /* CMU_PERIC0 */
#define CLK_MOUT_PERIC0_IP_USER 1 #define CLK_MOUT_PERIC0_IP_USER 1
@ -188,4 +189,50 @@
#define CLK_DOUT_PERIC0_USI_I2C 23 #define CLK_DOUT_PERIC0_USI_I2C 23
#define CLK_DOUT_PERIC0_I3C 24 #define CLK_DOUT_PERIC0_I3C 24
/* CMU_PERIC1 */
#define CLK_MOUT_PERIC1_IP_USER 1
#define CLK_MOUT_PERIC1_NOC_USER 2
#define CLK_MOUT_PERIC1_USI09_USI 3
#define CLK_MOUT_PERIC1_USI10_USI 4
#define CLK_MOUT_PERIC1_USI11_USI 5
#define CLK_MOUT_PERIC1_USI12_USI 6
#define CLK_MOUT_PERIC1_USI13_USI 7
#define CLK_MOUT_PERIC1_USI14_USI 8
#define CLK_MOUT_PERIC1_USI15_USI 9
#define CLK_MOUT_PERIC1_USI16_USI 10
#define CLK_MOUT_PERIC1_USI17_USI 11
#define CLK_MOUT_PERIC1_USI_I2C 12
#define CLK_MOUT_PERIC1_I3C 13
#define CLK_DOUT_PERIC1_USI09_USI 14
#define CLK_DOUT_PERIC1_USI10_USI 15
#define CLK_DOUT_PERIC1_USI11_USI 16
#define CLK_DOUT_PERIC1_USI12_USI 17
#define CLK_DOUT_PERIC1_USI13_USI 18
#define CLK_DOUT_PERIC1_USI14_USI 19
#define CLK_DOUT_PERIC1_USI15_USI 20
#define CLK_DOUT_PERIC1_USI16_USI 21
#define CLK_DOUT_PERIC1_USI17_USI 22
#define CLK_DOUT_PERIC1_USI_I2C 23
#define CLK_DOUT_PERIC1_I3C 24
/* CMU_MISC */
#define CLK_MOUT_MISC_NOC_USER 1
#define CLK_MOUT_MISC_GIC 2
#define CLK_DOUT_MISC_OTP 3
#define CLK_DOUT_MISC_NOCP 4
#define CLK_DOUT_MISC_OSC_DIV2 5
/* CMU_HSI0 */
#define CLK_MOUT_HSI0_NOC_USER 1
#define CLK_DOUT_HSI0_PCIE_APB 2
/* CMU_HSI1 */
#define CLK_MOUT_HSI1_MMC_CARD_USER 1
#define CLK_MOUT_HSI1_NOC_USER 2
#define CLK_MOUT_HSI1_USBDRD_USER 3
#define CLK_MOUT_HSI1_USBDRD 4
#endif /* _DT_BINDINGS_CLOCK_EXYNOSAUTOV920_H */ #endif /* _DT_BINDINGS_CLOCK_EXYNOSAUTOV920_H */