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https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git
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Merge branch 'x86-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip
* 'x86-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip: x86/agp: Fix agp_amd64_init regression x86: Add quirk for Intel DG45FC board to avoid low memory corruption x86: Add Dell OptiPlex 760 reboot quirk x86, UV: Fix RTC latency bug by reading replicated cachelines oprofile/x86: add Xeon 7500 series support oprofile/x86: fix crash when profiling more than 28 events lib/dma-debug.c: mark file-local struct symbol static. x86/amd-iommu: Fix deassignment of a device from the pt_domain x86/amd-iommu: Fix IOMMU-API initialization for iommu=pt x86/amd-iommu: Fix NULL pointer dereference in __detach_device() x86/amd-iommu: Fix possible integer overflow
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4ca5ded2bd
@ -31,6 +31,7 @@ extern void amd_iommu_reset_cmd_buffer(struct amd_iommu *iommu);
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extern int amd_iommu_init_devices(void);
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extern void amd_iommu_uninit_devices(void);
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extern void amd_iommu_init_notifier(void);
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extern void amd_iommu_init_api(void);
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#ifndef CONFIG_AMD_IOMMU_STATS
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static inline void amd_iommu_stats_init(void) { }
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@ -980,7 +980,7 @@ static int alloc_new_range(struct dma_ops_domain *dma_dom,
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{
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int index = dma_dom->aperture_size >> APERTURE_RANGE_SHIFT;
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struct amd_iommu *iommu;
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int i;
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unsigned long i;
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#ifdef CONFIG_IOMMU_STRESS
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populate = false;
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@ -1489,11 +1489,14 @@ static void __detach_device(struct device *dev)
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{
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struct iommu_dev_data *dev_data = get_dev_data(dev);
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struct iommu_dev_data *alias_data;
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struct protection_domain *domain;
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unsigned long flags;
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BUG_ON(!dev_data->domain);
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spin_lock_irqsave(&dev_data->domain->lock, flags);
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domain = dev_data->domain;
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spin_lock_irqsave(&domain->lock, flags);
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if (dev_data->alias != dev) {
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alias_data = get_dev_data(dev_data->alias);
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@ -1504,13 +1507,15 @@ static void __detach_device(struct device *dev)
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if (atomic_dec_and_test(&dev_data->bind))
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do_detach(dev);
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spin_unlock_irqrestore(&dev_data->domain->lock, flags);
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spin_unlock_irqrestore(&domain->lock, flags);
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/*
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* If we run in passthrough mode the device must be assigned to the
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* passthrough domain if it is detached from any other domain
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* passthrough domain if it is detached from any other domain.
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* Make sure we can deassign from the pt_domain itself.
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*/
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if (iommu_pass_through && dev_data->domain == NULL)
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if (iommu_pass_through &&
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(dev_data->domain == NULL && domain != pt_domain))
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__attach_device(dev, pt_domain);
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}
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@ -2218,6 +2223,12 @@ static struct dma_map_ops amd_iommu_dma_ops = {
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/*
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* The function which clues the AMD IOMMU driver into dma_ops.
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*/
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void __init amd_iommu_init_api(void)
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{
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register_iommu(&amd_iommu_ops);
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}
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int __init amd_iommu_init_dma_ops(void)
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{
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struct amd_iommu *iommu;
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@ -2253,8 +2264,6 @@ int __init amd_iommu_init_dma_ops(void)
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/* Make the driver finally visible to the drivers */
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dma_ops = &amd_iommu_dma_ops;
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register_iommu(&amd_iommu_ops);
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amd_iommu_stats_init();
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return 0;
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@ -1292,9 +1292,12 @@ static int __init amd_iommu_init(void)
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ret = amd_iommu_init_passthrough();
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else
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ret = amd_iommu_init_dma_ops();
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if (ret)
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goto free;
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amd_iommu_init_api();
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amd_iommu_init_notifier();
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enable_iommus();
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@ -203,6 +203,15 @@ static struct dmi_system_id __initdata reboot_dmi_table[] = {
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DMI_MATCH(DMI_BOARD_NAME, "0T656F"),
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},
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},
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{ /* Handle problems with rebooting on Dell OptiPlex 760 with 0G919G*/
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.callback = set_bios_reboot,
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.ident = "Dell OptiPlex 760",
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.matches = {
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DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
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DMI_MATCH(DMI_PRODUCT_NAME, "OptiPlex 760"),
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DMI_MATCH(DMI_BOARD_NAME, "0G919G"),
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},
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},
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{ /* Handle problems with rebooting on Dell 2400's */
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.callback = set_bios_reboot,
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.ident = "Dell PowerEdge 2400",
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@ -642,19 +642,27 @@ static struct dmi_system_id __initdata bad_bios_dmi_table[] = {
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DMI_MATCH(DMI_BIOS_VENDOR, "Phoenix/MSC"),
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},
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},
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{
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/*
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* AMI BIOS with low memory corruption was found on Intel DG45ID board.
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* It hase different DMI_BIOS_VENDOR = "Intel Corp.", for now we will
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* AMI BIOS with low memory corruption was found on Intel DG45ID and
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* DG45FC boards.
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* It has a different DMI_BIOS_VENDOR = "Intel Corp.", for now we will
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* match only DMI_BOARD_NAME and see if there is more bad products
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* with this vendor.
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*/
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{
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.callback = dmi_low_memory_corruption,
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.ident = "AMI BIOS",
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.matches = {
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DMI_MATCH(DMI_BOARD_NAME, "DG45ID"),
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},
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},
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{
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.callback = dmi_low_memory_corruption,
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.ident = "AMI BIOS",
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.matches = {
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DMI_MATCH(DMI_BOARD_NAME, "DG45FC"),
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},
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},
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#endif
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{}
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};
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@ -282,10 +282,21 @@ static int uv_rtc_unset_timer(int cpu, int force)
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/*
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* Read the RTC.
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*
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* Starting with HUB rev 2.0, the UV RTC register is replicated across all
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* cachelines of it's own page. This allows faster simultaneous reads
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* from a given socket.
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*/
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static cycle_t uv_read_rtc(struct clocksource *cs)
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{
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return (cycle_t)uv_read_local_mmr(UVH_RTC);
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unsigned long offset;
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if (uv_get_min_hub_revision_id() == 1)
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offset = 0;
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else
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offset = (uv_blade_processor_id() * L1_CACHE_BYTES) % PAGE_SIZE;
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return (cycle_t)uv_read_local_mmr(UVH_RTC | offset);
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}
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/*
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@ -222,7 +222,7 @@ static void nmi_cpu_switch(void *dummy)
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/* move to next set */
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si += model->num_counters;
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if ((si > model->num_virt_counters) || (counter_config[si].count == 0))
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if ((si >= model->num_virt_counters) || (counter_config[si].count == 0))
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per_cpu(switch_index, cpu) = 0;
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else
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per_cpu(switch_index, cpu) = si;
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@ -598,6 +598,7 @@ static int __init ppro_init(char **cpu_type)
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case 15: case 23:
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*cpu_type = "i386/core_2";
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break;
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case 0x2e:
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case 26:
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spec = &op_arch_perfmon_spec;
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*cpu_type = "i386/core_i7";
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@ -729,9 +729,6 @@ int __init agp_amd64_init(void)
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if (agp_off)
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return -EINVAL;
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if (gart_iommu_aperture)
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return agp_bridges_found ? 0 : -ENODEV;
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err = pci_register_driver(&agp_amd64_pci_driver);
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if (err < 0)
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return err;
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@ -768,6 +765,14 @@ int __init agp_amd64_init(void)
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return err;
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}
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static int __init agp_amd64_mod_init(void)
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{
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if (gart_iommu_aperture)
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return agp_bridges_found ? 0 : -ENODEV;
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return agp_amd64_init();
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}
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static void __exit agp_amd64_cleanup(void)
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{
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if (gart_iommu_aperture)
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@ -777,7 +782,7 @@ static void __exit agp_amd64_cleanup(void)
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pci_unregister_driver(&agp_amd64_pci_driver);
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}
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module_init(agp_amd64_init);
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module_init(agp_amd64_mod_init);
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module_exit(agp_amd64_cleanup);
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MODULE_AUTHOR("Dave Jones <davej@redhat.com>, Andi Kleen");
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@ -89,13 +89,17 @@ static long uv_mmtimer_ioctl(struct file *file, unsigned int cmd,
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switch (cmd) {
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case MMTIMER_GETOFFSET: /* offset of the counter */
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/*
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* UV RTC register is on its own page
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* Starting with HUB rev 2.0, the UV RTC register is
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* replicated across all cachelines of it's own page.
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* This allows faster simultaneous reads from a given socket.
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*
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* The offset returned is in 64 bit units.
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*/
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if (PAGE_SIZE <= (1 << 16))
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ret = ((UV_LOCAL_MMR_BASE | UVH_RTC) & (PAGE_SIZE-1))
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/ 8;
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if (uv_get_min_hub_revision_id() == 1)
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ret = 0;
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else
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ret = -ENOSYS;
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ret = ((uv_blade_processor_id() * L1_CACHE_BYTES) %
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PAGE_SIZE) / 8;
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break;
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case MMTIMER_GETRES: /* resolution of the clock in 10^-15 s */
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@ -115,8 +119,8 @@ static long uv_mmtimer_ioctl(struct file *file, unsigned int cmd,
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ret = hweight64(UVH_RTC_REAL_TIME_CLOCK_MASK);
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break;
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case MMTIMER_MMAPAVAIL: /* can we mmap the clock into userspace? */
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ret = (PAGE_SIZE <= (1 << 16)) ? 1 : 0;
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case MMTIMER_MMAPAVAIL:
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ret = 1;
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break;
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case MMTIMER_GETCOUNTER:
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@ -587,7 +587,7 @@ out_unlock:
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return count;
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}
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const struct file_operations filter_fops = {
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static const struct file_operations filter_fops = {
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.read = filter_read,
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.write = filter_write,
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};
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