mirror of
https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git
synced 2025-01-08 15:04:45 +00:00
dmaengine fixes for v5.14
Bunch of driver fixes, notably: - idxd driver fixes for submission race, driver remove sequence, setup sequence for MSIXPERM, array index and updating descriptor vector - usb-dmac, pm reference leak fix - xilinx_dma, read-after-free fix - uniphier-xdmac fix for using atomic readl_poll_timeout_atomic() - of-dma, router_xlate to return - imx-dma, generic dma fix -----BEGIN PGP SIGNATURE----- iQIzBAABCAAdFiEE+vs47OPLdNbVcHzyfBQHDyUjg0cFAmENQNMACgkQfBQHDyUj g0cwGQ//bmA6yGqlsyFpfcxBiKk+eNem+LYNxKftraFMFne8PpvoTTgiK1fJiCpM E6Jen4hLh5OQR7bDOHLCbwR+3MCNfhH9xTvnBo66+bY8eXqkA8PkR6twygsRcuEc 0kF74/dtOzaoM2z5uhfruE5i13wyGV8uQ9AE15Fiyrm44lIPseFpW24yVINNl5C0 GlG9O6uj+SdqLoXYb93zxQKvaZQWx7+zdMFInJnw+lahpF8rUYmM27ys9hdZBM0f WcJ6QxxTap9VkC8DbHNqzHUEAlLd1gezQka/PVDD0vTtwuhR5X8r/VeZctFrXm70 mg7dtDGXZcmPhqeTK6ikyWtrZVfpEDbZNwd/aqXWmi0kwzQ9xKseUE1fXLFqo582 mtfUlR65n5JtL7yTOSBkd+1k34/VI7zSEnOhff7X5TYZTtQjY1vSxFr6SnkmRKnK 5y5CtDYPHX2uiZJWhRuK9TfBBxL/udBgvSXBT6oJkdRjwYmRgIWGZi2PeCnW4i0h InbTglfBQKxa4FCK4rALZZLrfTdjsyuj+C6MHwp1W9XYJ824gNEK5GbDWMMPd45s cLTnxBpxoK4CGEDArU2qkUgAXMv8jI6xKV5mTg3lUHVLS7jvVnAL+2XPBrD5yDEz NaxjjGoF4E1Q5hbwLSZZfv9qUFhSwQs103tlVJHds9ptqjaLNXA= =knOL -----END PGP SIGNATURE----- Merge tag 'dmaengine-fix-5.14' of git://git.kernel.org/pub/scm/linux/kernel/git/vkoul/dmaengine Pull dmaengine fixes from Vinod Koul: "A bunch of driver fixes, notably: - idxd driver fixes for submission race, driver remove sequence, setup sequence for MSIXPERM, array index and updating descriptor vector - usb-dmac, pm reference leak fix - xilinx_dma, read-after-free fix - uniphier-xdmac fix for using atomic readl_poll_timeout_atomic() - of-dma, router_xlate to return - imx-dma, generic dma fix" * tag 'dmaengine-fix-5.14' of git://git.kernel.org/pub/scm/linux/kernel/git/vkoul/dmaengine: dmaengine: imx-dma: configure the generic DMA type to make it work dmaengine: of-dma: router_xlate to return -EPROBE_DEFER if controller is not yet available dmaengine: stm32-dmamux: Fix PM usage counter unbalance in stm32 dmamux ops dmaengine: stm32-dma: Fix PM usage counter imbalance in stm32 dma ops dmaengine: uniphier-xdmac: Use readl_poll_timeout_atomic() in atomic state dmaengine: idxd: fix submission race window dmaengine: idxd: fix sequence for pci driver remove() and shutdown() dmaengine: idxd: fix desc->vector that isn't being updated dmaengine: idxd: fix setup sequence for MSIXPERM table dmaengine: idxd: fix array index when int_handles are being used dmaengine: usb-dmac: Fix PM reference leak in usb_dmac_probe() dmaengine: xilinx_dma: Fix read-after-free bug when terminating transfers
This commit is contained in:
commit
4f1be39638
@ -294,6 +294,14 @@ struct idxd_desc {
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struct idxd_wq *wq;
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};
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/*
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* This is software defined error for the completion status. We overload the error code
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* that will never appear in completion status and only SWERR register.
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*/
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enum idxd_completion_status {
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IDXD_COMP_DESC_ABORT = 0xff,
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};
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#define confdev_to_idxd(dev) container_of(dev, struct idxd_device, conf_dev)
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#define confdev_to_wq(dev) container_of(dev, struct idxd_wq, conf_dev)
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@ -482,4 +490,10 @@ static inline void perfmon_init(void) {}
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static inline void perfmon_exit(void) {}
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#endif
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static inline void complete_desc(struct idxd_desc *desc, enum idxd_complete_type reason)
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{
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idxd_dma_complete_txd(desc, reason);
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idxd_free_desc(desc->wq, desc);
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}
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#endif
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@ -102,6 +102,8 @@ static int idxd_setup_interrupts(struct idxd_device *idxd)
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spin_lock_init(&idxd->irq_entries[i].list_lock);
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}
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idxd_msix_perm_setup(idxd);
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irq_entry = &idxd->irq_entries[0];
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rc = request_threaded_irq(irq_entry->vector, NULL, idxd_misc_thread,
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0, "idxd-misc", irq_entry);
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@ -148,7 +150,6 @@ static int idxd_setup_interrupts(struct idxd_device *idxd)
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}
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idxd_unmask_error_interrupts(idxd);
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idxd_msix_perm_setup(idxd);
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return 0;
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err_wq_irqs:
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@ -162,6 +163,7 @@ static int idxd_setup_interrupts(struct idxd_device *idxd)
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err_misc_irq:
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/* Disable error interrupt generation */
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idxd_mask_error_interrupts(idxd);
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idxd_msix_perm_clear(idxd);
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err_irq_entries:
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pci_free_irq_vectors(pdev);
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dev_err(dev, "No usable interrupts\n");
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@ -758,32 +760,40 @@ static void idxd_shutdown(struct pci_dev *pdev)
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for (i = 0; i < msixcnt; i++) {
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irq_entry = &idxd->irq_entries[i];
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synchronize_irq(irq_entry->vector);
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free_irq(irq_entry->vector, irq_entry);
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if (i == 0)
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continue;
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idxd_flush_pending_llist(irq_entry);
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idxd_flush_work_list(irq_entry);
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}
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idxd_msix_perm_clear(idxd);
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idxd_release_int_handles(idxd);
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pci_free_irq_vectors(pdev);
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pci_iounmap(pdev, idxd->reg_base);
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pci_disable_device(pdev);
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destroy_workqueue(idxd->wq);
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flush_workqueue(idxd->wq);
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}
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static void idxd_remove(struct pci_dev *pdev)
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{
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struct idxd_device *idxd = pci_get_drvdata(pdev);
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struct idxd_irq_entry *irq_entry;
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int msixcnt = pci_msix_vec_count(pdev);
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int i;
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dev_dbg(&pdev->dev, "%s called\n", __func__);
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idxd_shutdown(pdev);
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if (device_pasid_enabled(idxd))
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idxd_disable_system_pasid(idxd);
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idxd_unregister_devices(idxd);
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perfmon_pmu_remove(idxd);
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for (i = 0; i < msixcnt; i++) {
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irq_entry = &idxd->irq_entries[i];
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free_irq(irq_entry->vector, irq_entry);
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}
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idxd_msix_perm_clear(idxd);
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idxd_release_int_handles(idxd);
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pci_free_irq_vectors(pdev);
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pci_iounmap(pdev, idxd->reg_base);
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iommu_dev_disable_feature(&pdev->dev, IOMMU_DEV_FEAT_SVA);
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pci_disable_device(pdev);
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destroy_workqueue(idxd->wq);
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perfmon_pmu_remove(idxd);
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device_unregister(&idxd->conf_dev);
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}
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static struct pci_driver idxd_pci_driver = {
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@ -245,12 +245,6 @@ static inline bool match_fault(struct idxd_desc *desc, u64 fault_addr)
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return false;
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}
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static inline void complete_desc(struct idxd_desc *desc, enum idxd_complete_type reason)
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{
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idxd_dma_complete_txd(desc, reason);
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idxd_free_desc(desc->wq, desc);
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}
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static int irq_process_pending_llist(struct idxd_irq_entry *irq_entry,
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enum irq_work_type wtype,
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int *processed, u64 data)
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@ -272,8 +266,16 @@ static int irq_process_pending_llist(struct idxd_irq_entry *irq_entry,
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reason = IDXD_COMPLETE_DEV_FAIL;
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llist_for_each_entry_safe(desc, t, head, llnode) {
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if (desc->completion->status) {
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if ((desc->completion->status & DSA_COMP_STATUS_MASK) != DSA_COMP_SUCCESS)
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u8 status = desc->completion->status & DSA_COMP_STATUS_MASK;
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if (status) {
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if (unlikely(status == IDXD_COMP_DESC_ABORT)) {
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complete_desc(desc, IDXD_COMPLETE_ABORT);
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(*processed)++;
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continue;
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}
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if (unlikely(status != DSA_COMP_SUCCESS))
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match_fault(desc, data);
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complete_desc(desc, reason);
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(*processed)++;
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@ -329,7 +331,14 @@ static int irq_process_work_list(struct idxd_irq_entry *irq_entry,
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spin_unlock_irqrestore(&irq_entry->list_lock, flags);
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list_for_each_entry(desc, &flist, list) {
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if ((desc->completion->status & DSA_COMP_STATUS_MASK) != DSA_COMP_SUCCESS)
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u8 status = desc->completion->status & DSA_COMP_STATUS_MASK;
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if (unlikely(status == IDXD_COMP_DESC_ABORT)) {
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complete_desc(desc, IDXD_COMPLETE_ABORT);
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continue;
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}
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if (unlikely(status != DSA_COMP_SUCCESS))
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match_fault(desc, data);
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complete_desc(desc, reason);
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}
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@ -25,11 +25,10 @@ static struct idxd_desc *__get_desc(struct idxd_wq *wq, int idx, int cpu)
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* Descriptor completion vectors are 1...N for MSIX. We will round
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* robin through the N vectors.
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*/
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wq->vec_ptr = (wq->vec_ptr % idxd->num_wq_irqs) + 1;
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wq->vec_ptr = desc->vector = (wq->vec_ptr % idxd->num_wq_irqs) + 1;
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if (!idxd->int_handles) {
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desc->hw->int_handle = wq->vec_ptr;
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} else {
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desc->vector = wq->vec_ptr;
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/*
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* int_handles are only for descriptor completion. However for device
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* MSIX enumeration, vec 0 is used for misc interrupts. Therefore even
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@ -88,9 +87,64 @@ void idxd_free_desc(struct idxd_wq *wq, struct idxd_desc *desc)
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sbitmap_queue_clear(&wq->sbq, desc->id, cpu);
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}
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static struct idxd_desc *list_abort_desc(struct idxd_wq *wq, struct idxd_irq_entry *ie,
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struct idxd_desc *desc)
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{
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struct idxd_desc *d, *n;
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lockdep_assert_held(&ie->list_lock);
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list_for_each_entry_safe(d, n, &ie->work_list, list) {
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if (d == desc) {
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list_del(&d->list);
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return d;
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}
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}
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/*
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* At this point, the desc needs to be aborted is held by the completion
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* handler where it has taken it off the pending list but has not added to the
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* work list. It will be cleaned up by the interrupt handler when it sees the
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* IDXD_COMP_DESC_ABORT for completion status.
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*/
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return NULL;
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}
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static void llist_abort_desc(struct idxd_wq *wq, struct idxd_irq_entry *ie,
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struct idxd_desc *desc)
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{
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struct idxd_desc *d, *t, *found = NULL;
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struct llist_node *head;
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unsigned long flags;
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desc->completion->status = IDXD_COMP_DESC_ABORT;
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/*
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* Grab the list lock so it will block the irq thread handler. This allows the
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* abort code to locate the descriptor need to be aborted.
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*/
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spin_lock_irqsave(&ie->list_lock, flags);
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head = llist_del_all(&ie->pending_llist);
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if (head) {
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llist_for_each_entry_safe(d, t, head, llnode) {
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if (d == desc) {
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found = desc;
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continue;
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}
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list_add_tail(&desc->list, &ie->work_list);
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}
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}
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if (!found)
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found = list_abort_desc(wq, ie, desc);
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spin_unlock_irqrestore(&ie->list_lock, flags);
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if (found)
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complete_desc(found, IDXD_COMPLETE_ABORT);
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}
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int idxd_submit_desc(struct idxd_wq *wq, struct idxd_desc *desc)
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{
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struct idxd_device *idxd = wq->idxd;
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struct idxd_irq_entry *ie = NULL;
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void __iomem *portal;
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int rc;
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@ -108,6 +162,16 @@ int idxd_submit_desc(struct idxd_wq *wq, struct idxd_desc *desc)
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* even on UP because the recipient is a device.
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*/
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wmb();
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/*
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* Pending the descriptor to the lockless list for the irq_entry
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* that we designated the descriptor to.
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*/
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if (desc->hw->flags & IDXD_OP_FLAG_RCI) {
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ie = &idxd->irq_entries[desc->vector];
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llist_add(&desc->llnode, &ie->pending_llist);
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}
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if (wq_dedicated(wq)) {
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iosubmit_cmds512(portal, desc->hw, 1);
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} else {
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@ -118,29 +182,13 @@ int idxd_submit_desc(struct idxd_wq *wq, struct idxd_desc *desc)
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* device is not accepting descriptor at all.
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*/
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rc = enqcmds(portal, desc->hw);
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if (rc < 0)
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if (rc < 0) {
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if (ie)
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llist_abort_desc(wq, ie, desc);
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return rc;
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}
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}
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percpu_ref_put(&wq->wq_active);
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/*
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* Pending the descriptor to the lockless list for the irq_entry
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* that we designated the descriptor to.
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*/
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if (desc->hw->flags & IDXD_OP_FLAG_RCI) {
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int vec;
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/*
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* If the driver is on host kernel, it would be the value
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* assigned to interrupt handle, which is index for MSIX
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* vector. If it's guest then can't use the int_handle since
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* that is the index to IMS for the entire device. The guest
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* device local index will be used.
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*/
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vec = !idxd->int_handles ? desc->hw->int_handle : desc->vector;
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llist_add(&desc->llnode, &idxd->irq_entries[vec].pending_llist);
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}
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return 0;
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}
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|
@ -1744,8 +1744,6 @@ void idxd_unregister_devices(struct idxd_device *idxd)
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device_unregister(&group->conf_dev);
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}
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device_unregister(&idxd->conf_dev);
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}
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int idxd_register_bus_type(void)
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|
@ -812,6 +812,8 @@ static struct dma_async_tx_descriptor *imxdma_prep_slave_sg(
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dma_length += sg_dma_len(sg);
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}
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imxdma_config_write(chan, &imxdmac->config, direction);
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switch (imxdmac->word_size) {
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case DMA_SLAVE_BUSWIDTH_4_BYTES:
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if (sg_dma_len(sgl) & 3 || sgl->dma_address & 3)
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|
@ -67,8 +67,12 @@ static struct dma_chan *of_dma_router_xlate(struct of_phandle_args *dma_spec,
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||||
return NULL;
|
||||
|
||||
ofdma_target = of_dma_find_controller(&dma_spec_target);
|
||||
if (!ofdma_target)
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||||
return NULL;
|
||||
if (!ofdma_target) {
|
||||
ofdma->dma_router->route_free(ofdma->dma_router->dev,
|
||||
route_data);
|
||||
chan = ERR_PTR(-EPROBE_DEFER);
|
||||
goto err;
|
||||
}
|
||||
|
||||
chan = ofdma_target->of_dma_xlate(&dma_spec_target, ofdma_target);
|
||||
if (IS_ERR_OR_NULL(chan)) {
|
||||
@ -89,6 +93,7 @@ static struct dma_chan *of_dma_router_xlate(struct of_phandle_args *dma_spec,
|
||||
}
|
||||
}
|
||||
|
||||
err:
|
||||
/*
|
||||
* Need to put the node back since the ofdma->of_dma_route_allocate
|
||||
* has taken it for generating the new, translated dma_spec
|
||||
|
@ -855,8 +855,8 @@ static int usb_dmac_probe(struct platform_device *pdev)
|
||||
|
||||
error:
|
||||
of_dma_controller_free(pdev->dev.of_node);
|
||||
pm_runtime_put(&pdev->dev);
|
||||
error_pm:
|
||||
pm_runtime_put(&pdev->dev);
|
||||
pm_runtime_disable(&pdev->dev);
|
||||
return ret;
|
||||
}
|
||||
|
@ -1200,7 +1200,7 @@ static int stm32_dma_alloc_chan_resources(struct dma_chan *c)
|
||||
|
||||
chan->config_init = false;
|
||||
|
||||
ret = pm_runtime_get_sync(dmadev->ddev.dev);
|
||||
ret = pm_runtime_resume_and_get(dmadev->ddev.dev);
|
||||
if (ret < 0)
|
||||
return ret;
|
||||
|
||||
@ -1470,7 +1470,7 @@ static int stm32_dma_suspend(struct device *dev)
|
||||
struct stm32_dma_device *dmadev = dev_get_drvdata(dev);
|
||||
int id, ret, scr;
|
||||
|
||||
ret = pm_runtime_get_sync(dev);
|
||||
ret = pm_runtime_resume_and_get(dev);
|
||||
if (ret < 0)
|
||||
return ret;
|
||||
|
||||
|
@ -137,7 +137,7 @@ static void *stm32_dmamux_route_allocate(struct of_phandle_args *dma_spec,
|
||||
|
||||
/* Set dma request */
|
||||
spin_lock_irqsave(&dmamux->lock, flags);
|
||||
ret = pm_runtime_get_sync(&pdev->dev);
|
||||
ret = pm_runtime_resume_and_get(&pdev->dev);
|
||||
if (ret < 0) {
|
||||
spin_unlock_irqrestore(&dmamux->lock, flags);
|
||||
goto error;
|
||||
@ -336,7 +336,7 @@ static int stm32_dmamux_suspend(struct device *dev)
|
||||
struct stm32_dmamux_data *stm32_dmamux = platform_get_drvdata(pdev);
|
||||
int i, ret;
|
||||
|
||||
ret = pm_runtime_get_sync(dev);
|
||||
ret = pm_runtime_resume_and_get(dev);
|
||||
if (ret < 0)
|
||||
return ret;
|
||||
|
||||
@ -361,7 +361,7 @@ static int stm32_dmamux_resume(struct device *dev)
|
||||
if (ret < 0)
|
||||
return ret;
|
||||
|
||||
ret = pm_runtime_get_sync(dev);
|
||||
ret = pm_runtime_resume_and_get(dev);
|
||||
if (ret < 0)
|
||||
return ret;
|
||||
|
||||
|
@ -209,8 +209,8 @@ static int uniphier_xdmac_chan_stop(struct uniphier_xdmac_chan *xc)
|
||||
writel(0, xc->reg_ch_base + XDMAC_TSS);
|
||||
|
||||
/* wait until transfer is stopped */
|
||||
return readl_poll_timeout(xc->reg_ch_base + XDMAC_STAT, val,
|
||||
!(val & XDMAC_STAT_TENF), 100, 1000);
|
||||
return readl_poll_timeout_atomic(xc->reg_ch_base + XDMAC_STAT, val,
|
||||
!(val & XDMAC_STAT_TENF), 100, 1000);
|
||||
}
|
||||
|
||||
/* xc->vc.lock must be held by caller */
|
||||
|
@ -394,6 +394,7 @@ struct xilinx_dma_tx_descriptor {
|
||||
* @genlock: Support genlock mode
|
||||
* @err: Channel has errors
|
||||
* @idle: Check for channel idle
|
||||
* @terminating: Check for channel being synchronized by user
|
||||
* @tasklet: Cleanup work after irq
|
||||
* @config: Device configuration info
|
||||
* @flush_on_fsync: Flush on Frame sync
|
||||
@ -431,6 +432,7 @@ struct xilinx_dma_chan {
|
||||
bool genlock;
|
||||
bool err;
|
||||
bool idle;
|
||||
bool terminating;
|
||||
struct tasklet_struct tasklet;
|
||||
struct xilinx_vdma_config config;
|
||||
bool flush_on_fsync;
|
||||
@ -1049,6 +1051,13 @@ static void xilinx_dma_chan_desc_cleanup(struct xilinx_dma_chan *chan)
|
||||
/* Run any dependencies, then free the descriptor */
|
||||
dma_run_dependencies(&desc->async_tx);
|
||||
xilinx_dma_free_tx_descriptor(chan, desc);
|
||||
|
||||
/*
|
||||
* While we ran a callback the user called a terminate function,
|
||||
* which takes care of cleaning up any remaining descriptors
|
||||
*/
|
||||
if (chan->terminating)
|
||||
break;
|
||||
}
|
||||
|
||||
spin_unlock_irqrestore(&chan->lock, flags);
|
||||
@ -1965,6 +1974,8 @@ static dma_cookie_t xilinx_dma_tx_submit(struct dma_async_tx_descriptor *tx)
|
||||
if (desc->cyclic)
|
||||
chan->cyclic = true;
|
||||
|
||||
chan->terminating = false;
|
||||
|
||||
spin_unlock_irqrestore(&chan->lock, flags);
|
||||
|
||||
return cookie;
|
||||
@ -2436,6 +2447,7 @@ static int xilinx_dma_terminate_all(struct dma_chan *dchan)
|
||||
|
||||
xilinx_dma_chan_reset(chan);
|
||||
/* Remove and free all of the descriptors in the lists */
|
||||
chan->terminating = true;
|
||||
xilinx_dma_free_descriptors(chan);
|
||||
chan->idle = true;
|
||||
|
||||
|
Loading…
Reference in New Issue
Block a user