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cpufreq/amd-pstate: Store the boost numerator as highest perf again
commitad4caad58d
("cpufreq: amd-pstate: Merge amd_pstate_highest_perf_set() into amd_get_boost_ratio_numerator()") changed the semantics for highest perf and commit18d9b52271
("cpufreq/amd-pstate: Use nominal perf for limits when boost is disabled") worked around those semantic changes. This however is a confusing result and furthermore makes it awkward to change frequency limits and boost due to the scaling differences. Restore the boost numerator to highest perf again. Suggested-by: Dhananjay Ugwekar <Dhananjay.Ugwekar@amd.com> Reviewed-by: Gautham R. Shenoy <gautham.shenoy@amd.com> Fixes:ad4caad58d
("cpufreq: amd-pstate: Merge amd_pstate_highest_perf_set() into amd_get_boost_ratio_numerator()") Link: https://lore.kernel.org/r/20241209185248.16301-2-mario.limonciello@amd.com Signed-off-by: Mario Limonciello <mario.limonciello@amd.com>
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@ -251,9 +251,7 @@ performance supported in `AMD CPPC Performance Capability <perf_cap_>`_).
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In some ASICs, the highest CPPC performance is not the one in the ``_CPC``
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table, so we need to expose it to sysfs. If boost is not active, but
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still supported, this maximum frequency will be larger than the one in
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``cpuinfo``. On systems that support preferred core, the driver will have
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different values for some cores than others and this will reflect the values
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advertised by the platform at bootup.
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``cpuinfo``.
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This attribute is read-only.
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``amd_pstate_lowest_nonlinear_freq``
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@ -374,15 +374,19 @@ static inline int amd_pstate_cppc_enable(bool enable)
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static int msr_init_perf(struct amd_cpudata *cpudata)
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{
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u64 cap1;
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u64 cap1, numerator;
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int ret = rdmsrl_safe_on_cpu(cpudata->cpu, MSR_AMD_CPPC_CAP1,
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&cap1);
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if (ret)
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return ret;
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WRITE_ONCE(cpudata->highest_perf, AMD_CPPC_HIGHEST_PERF(cap1));
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WRITE_ONCE(cpudata->max_limit_perf, AMD_CPPC_HIGHEST_PERF(cap1));
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ret = amd_get_boost_ratio_numerator(cpudata->cpu, &numerator);
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if (ret)
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return ret;
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WRITE_ONCE(cpudata->highest_perf, numerator);
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WRITE_ONCE(cpudata->max_limit_perf, numerator);
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WRITE_ONCE(cpudata->nominal_perf, AMD_CPPC_NOMINAL_PERF(cap1));
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WRITE_ONCE(cpudata->lowest_nonlinear_perf, AMD_CPPC_LOWNONLIN_PERF(cap1));
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WRITE_ONCE(cpudata->lowest_perf, AMD_CPPC_LOWEST_PERF(cap1));
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@ -394,13 +398,18 @@ static int msr_init_perf(struct amd_cpudata *cpudata)
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static int shmem_init_perf(struct amd_cpudata *cpudata)
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{
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struct cppc_perf_caps cppc_perf;
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u64 numerator;
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int ret = cppc_get_perf_caps(cpudata->cpu, &cppc_perf);
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if (ret)
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return ret;
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WRITE_ONCE(cpudata->highest_perf, cppc_perf.highest_perf);
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WRITE_ONCE(cpudata->max_limit_perf, cppc_perf.highest_perf);
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ret = amd_get_boost_ratio_numerator(cpudata->cpu, &numerator);
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if (ret)
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return ret;
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WRITE_ONCE(cpudata->highest_perf, numerator);
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WRITE_ONCE(cpudata->max_limit_perf, numerator);
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WRITE_ONCE(cpudata->nominal_perf, cppc_perf.nominal_perf);
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WRITE_ONCE(cpudata->lowest_nonlinear_perf,
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cppc_perf.lowest_nonlinear_perf);
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@ -889,7 +898,6 @@ static int amd_pstate_init_freq(struct amd_cpudata *cpudata)
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{
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int ret;
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u32 min_freq, max_freq;
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u64 numerator;
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u32 nominal_perf, nominal_freq;
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u32 lowest_nonlinear_perf, lowest_nonlinear_freq;
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u32 boost_ratio, lowest_nonlinear_ratio;
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@ -911,10 +919,7 @@ static int amd_pstate_init_freq(struct amd_cpudata *cpudata)
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nominal_perf = READ_ONCE(cpudata->nominal_perf);
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ret = amd_get_boost_ratio_numerator(cpudata->cpu, &numerator);
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if (ret)
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return ret;
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boost_ratio = div_u64(numerator << SCHED_CAPACITY_SHIFT, nominal_perf);
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boost_ratio = div_u64(cpudata->highest_perf << SCHED_CAPACITY_SHIFT, nominal_perf);
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max_freq = (nominal_freq * boost_ratio >> SCHED_CAPACITY_SHIFT) * 1000;
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lowest_nonlinear_perf = READ_ONCE(cpudata->lowest_nonlinear_perf);
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