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pinctrl: atlas7: adjust vip pin groups for atlas7
The vip low 8bit mode and vip high 8 bit mode pin groups had missed 3 pins:vip_vsync, vip_hsync and vip_pxclk. Without these 3 pins, the vip could not work properly. Now we add these 3 pins into these two pin groups. Signed-off-by: Wei Chen <Wei.Chen@csr.com> Signed-off-by: Barry Song <Baohua.Song@csr.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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@ -1002,9 +1002,9 @@ static const unsigned int vi_vip1_ext_pins[] = { 74, 75, 76, 77, 78, 79, 80,
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81, 82, 83, 84, 108, 103, 104, 105, 106, 107, 102, 97, 98,
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99, 100, };
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static const unsigned int vi_vip1_low8bit_pins[] = { 74, 75, 76, 77, 78, 79,
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80, 81, };
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static const unsigned int vi_vip1_high8bit_pins[] = { 82, 83, 84, 108, 103,
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104, 105, 106, };
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80, 81, 82, 83, 84, };
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static const unsigned int vi_vip1_high8bit_pins[] = { 82, 83, 84, 103, 104,
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105, 106, 107, 102, 97, 98, };
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/* definition of pin group table */
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struct atlas7_pin_group altas7_pin_groups[] = {
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@ -4294,6 +4294,9 @@ static struct atlas7_pad_mux vi_vip1_low8bit_grp_pad_mux[] = {
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MUX(1, 79, 1, N, N, N, N),
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MUX(1, 80, 1, N, N, N, N),
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MUX(1, 81, 1, N, N, N, N),
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MUX(1, 82, 1, N, N, N, N),
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MUX(1, 83, 1, N, N, N, N),
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MUX(1, 84, 1, N, N, N, N),
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};
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static struct atlas7_grp_mux vi_vip1_low8bit_grp_mux = {
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@ -4305,11 +4308,14 @@ static struct atlas7_pad_mux vi_vip1_high8bit_grp_pad_mux[] = {
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MUX(1, 82, 1, N, N, N, N),
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MUX(1, 83, 1, N, N, N, N),
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MUX(1, 84, 1, N, N, N, N),
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MUX(1, 108, 2, N, N, N, N),
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MUX(1, 103, 2, N, N, N, N),
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MUX(1, 104, 2, N, N, N, N),
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MUX(1, 105, 2, N, N, N, N),
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MUX(1, 106, 2, N, N, N, N),
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MUX(1, 107, 2, N, N, N, N),
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MUX(1, 102, 2, N, N, N, N),
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MUX(1, 97, 2, N, N, N, N),
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MUX(1, 98, 2, N, N, N, N),
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};
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static struct atlas7_grp_mux vi_vip1_high8bit_grp_mux = {
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