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hwrng: stm32 - allow disable clock error detection

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Add a new property that allow to disable the clock error
detection which is required when the clock source selected
is out of specification (which is not mandatory).

Signed-off-by: Lionel Debieve <lionel.debieve@st.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
This commit is contained in:
lionel.debieve@st.com 2018-02-15 14:03:10 +01:00 committed by Herbert Xu
parent 695788fd1b
commit 529571ed8d
1 changed files with 9 additions and 1 deletions
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10
drivers/char/hw_random/stm32-rng.c
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@ -26,6 +26,7 @@
#define RNG_CR 0x00 #define RNG_CR 0x00
#define RNG_CR_RNGEN BIT(2) #define RNG_CR_RNGEN BIT(2)
#define RNG_CR_CED BIT(5)
#define RNG_SR 0x04 #define RNG_SR 0x04
#define RNG_SR_SEIS BIT(6) #define RNG_SR_SEIS BIT(6)
@ -48,6 +49,7 @@ struct stm32_rng_private {
void __iomem *base; void __iomem *base;
struct clk *clk; struct clk *clk;
struct reset_control *rst; struct reset_control *rst;
bool ced;
}; };
static int stm32_rng_read(struct hwrng *rng, void *data, size_t max, bool wait) static int stm32_rng_read(struct hwrng *rng, void *data, size_t max, bool wait)
@ -101,7 +103,11 @@ static int stm32_rng_init(struct hwrng *rng)
if (err) if (err)
return err; return err;
writel_relaxed(RNG_CR_RNGEN, priv->base + RNG_CR); if (priv->ced)
writel_relaxed(RNG_CR_RNGEN, priv->base + RNG_CR);
else
writel_relaxed(RNG_CR_RNGEN | RNG_CR_CED,
priv->base + RNG_CR);
/* clear error indicators */ /* clear error indicators */
writel_relaxed(0, priv->base + RNG_SR); writel_relaxed(0, priv->base + RNG_SR);
@ -149,6 +155,8 @@ static int stm32_rng_probe(struct platform_device *ofdev)
reset_control_deassert(priv->rst); reset_control_deassert(priv->rst);
} }
priv->ced = of_property_read_bool(np, "clock-error-detect");
dev_set_drvdata(dev, priv); dev_set_drvdata(dev, priv);
priv->rng.name = dev_driver_string(dev), priv->rng.name = dev_driver_string(dev),