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intel-pinctrl for v6.13-2
This includes following Intel pinctrl changes for v6.13 merge window: - Expose DSW community on Elkhart Lake. - Elaborate in the code comment the pull bias settings. Both have been in linux-next with no reported issues. -----BEGIN PGP SIGNATURE----- iQJUBAABCgA+FiEEVTdhRGBbNzLrSUBaAP2fSd+ZWKAFAmcskXwgHG1pa2Eud2Vz dGVyYmVyZ0BsaW51eC5pbnRlbC5jb20ACgkQAP2fSd+ZWKBZWg/8CN4qU9KeZrMK gao6NLTSFmwUsesGK7S/Lk3LpKYOquGarEIxMSeHTBMFOIgu+RQ+meqjpTm7X0Oa fXUDzOPdhwqw36EbqR8DVSXoAeNSfwK2sfmQeOKbQFfBtgFLbSNyfdYFr1kJnYlw 7zKSsLXNxgi1KFu81K0zyPzPkX6EEy1jmSLQ0k3uXFfqDvagy3d1h2nvSvV9ze6f WtPz1H8wye2a5WCOC2HnFujmXWFBByp+QEfyNMB4vwwPEoN2ZgbogCq11lyDJufc DtlHUM0jf1nslL3F9RE/nfP/k2AHYZ6Y4gDXBFaUHF1LyaEzzmHh+afMErvfjMvs j7v3s+6RG2bAzrDB0bZC1EZ9UUuSW2pIS/Fyo0Sd+IKGI2m90As1IccveI5m3hqJ b1AF5mGqF9ljxPdJtCEfxpZGR+57r0uAU/mQxE2/mQjKSM5KmJ9BeWBR0WwbSqnE o5zBoba+/v1YipkDFk2UXSHDXdzBu8Qtlt0pOHaNigtewOZsc0tWrz3jptiiFtPv YTuZ8mv67PgZOm1hZY58coEMvs4bRsO98+NmGkAXu6Wi2CWVcaqo67GJEsqLsTrw pfAtdjO31iWxmg7vfm3E4/6tEZw3/KdlYWJ2lKT7fXL3O2mGxGeTpIk95QsTsq1S aZHWETf5GXiE+lq4jGh0ag8X3ZfgKzg= =TQtH -----END PGP SIGNATURE----- Merge tag 'intel-pinctrl-v6.13-2' of git://git.kernel.org/pub/scm/linux/kernel/git/pinctrl/intel into devel intel-pinctrl for v6.13-2 This includes following Intel pinctrl changes for v6.13 merge window: - Expose DSW community on Elkhart Lake. - Elaborate in the code comment the pull bias settings. Both have been in linux-next with no reported issues. Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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commit
546ee7b890
@ -264,6 +264,43 @@ static const struct intel_pinctrl_soc_data ehl_community1_soc_data = {
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.ncommunities = ARRAY_SIZE(ehl_community1),
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};
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static const struct pinctrl_pin_desc ehl_community2_pins[] = {
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/* DSW */
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PINCTRL_PIN(0, "BATLOWB"),
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PINCTRL_PIN(1, "ACPRESENT"),
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PINCTRL_PIN(2, "LAN_WAKEB"),
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PINCTRL_PIN(3, "PWRBTNB"),
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PINCTRL_PIN(4, "SLP_S3B"),
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PINCTRL_PIN(5, "SLP_S4B"),
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PINCTRL_PIN(6, "SLP_AB"),
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PINCTRL_PIN(7, "GPD_7"),
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PINCTRL_PIN(8, "SUSCLK"),
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PINCTRL_PIN(9, "SLP_WLANB"),
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PINCTRL_PIN(10, "SLP_S5B"),
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PINCTRL_PIN(11, "LANPHYPC"),
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PINCTRL_PIN(12, "INPUT3VSEL"),
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PINCTRL_PIN(13, "SLP_LANB"),
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PINCTRL_PIN(14, "SLP_SUSB"),
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PINCTRL_PIN(15, "WAKEB"),
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PINCTRL_PIN(16, "DRAM_RESETB"),
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};
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static const struct intel_padgroup ehl_community2_gpps[] = {
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EHL_GPP(0, 0, 16), /* DSW */
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};
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static const struct intel_community ehl_community2[] = {
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EHL_COMMUNITY(0, 0, 16, ehl_community2_gpps),
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};
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static const struct intel_pinctrl_soc_data ehl_community2_soc_data = {
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.uid = "2",
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.pins = ehl_community2_pins,
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.npins = ARRAY_SIZE(ehl_community2_pins),
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.communities = ehl_community2,
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.ncommunities = ARRAY_SIZE(ehl_community2),
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};
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static const struct pinctrl_pin_desc ehl_community3_pins[] = {
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/* CPU */
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PINCTRL_PIN(0, "HDACPU_SDI"),
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@ -474,6 +511,7 @@ static const struct intel_pinctrl_soc_data ehl_community5_soc_data = {
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static const struct intel_pinctrl_soc_data *ehl_soc_data_array[] = {
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&ehl_community0_soc_data,
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&ehl_community1_soc_data,
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&ehl_community2_soc_data,
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&ehl_community3_soc_data,
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&ehl_community4_soc_data,
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&ehl_community5_soc_data,
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@ -85,6 +85,18 @@
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#define PADCFG1_TERM_UP BIT(13)
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#define PADCFG1_TERM_SHIFT 10
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#define PADCFG1_TERM_MASK GENMASK(12, 10)
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/*
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* Bit 0 Bit 1 Bit 2 Value, Ohms
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*
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* 0 0 0 -
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* 0 0 1 20000
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* 0 1 0 5000
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* 0 1 1 ~4000
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* 1 0 0 1000 (if supported)
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* 1 0 1 ~952 (if supported)
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* 1 1 0 ~833 (if supported)
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* 1 1 1 ~800 (if supported)
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*/
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#define PADCFG1_TERM_20K BIT(2)
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#define PADCFG1_TERM_5K BIT(1)
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#define PADCFG1_TERM_4K (BIT(2) | BIT(1))
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