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ASoC: rt5670: Correct RT5670_LDO_SEL_MASK
The RT5670_PWR_ANLG1 register has 3 bits to select the LDO voltage, so the correct mask is 0x7 not 0x3. Because of this wrong mask we were programming the ldo bits to a setting of binary 001 (0x05 & 0x03) instead of binary 101 when moving to SND_SOC_BIAS_PREPARE. According to the datasheet 001 is a reserved value, so no idea what it did, since the driver was working fine before I guess we got lucky and it does something which is ok. Fixes: 5e8351de740d ("ASoC: add RT5670 CODEC driver") Signed-off-by: Hans de Goede <hdegoede@redhat.com> Cc: stable@vger.kernel.org Link: https://lore.kernel.org/r/20200628155231.71089-3-hdegoede@redhat.com Signed-off-by: Mark Brown <broonie@kernel.org>
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@ -757,7 +757,7 @@
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#define RT5670_PWR_VREF2_BIT 4
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#define RT5670_PWR_FV2 (0x1 << 3)
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#define RT5670_PWR_FV2_BIT 3
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#define RT5670_LDO_SEL_MASK (0x3)
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#define RT5670_LDO_SEL_MASK (0x7)
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#define RT5670_LDO_SEL_SFT 0
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/* Power Management for Analog 2 (0x64) */
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