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drm/i915: Fix fast wake AUX sync len
Fast wake should use 8 SYNC pulses for the preamble and 10-16 SYNC pulses for the precharge. Reduce our fast wake SYNC count to match the maximum value. We also use the maximum precharge length for normal AUX transactions. Cc: Jouni Högander <jouni.hogander@intel.com> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20230329172434.18744-1-ville.syrjala@linux.intel.com Reviewed-by: Jouni Högander <jouni.hogander@intel.com>
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@ -165,7 +165,7 @@ static u32 skl_get_aux_send_ctl(struct intel_dp *intel_dp,
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DP_AUX_CH_CTL_TIME_OUT_MAX |
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DP_AUX_CH_CTL_RECEIVE_ERROR |
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(send_bytes << DP_AUX_CH_CTL_MESSAGE_SIZE_SHIFT) |
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DP_AUX_CH_CTL_FW_SYNC_PULSE_SKL(32) |
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DP_AUX_CH_CTL_FW_SYNC_PULSE_SKL(24) |
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DP_AUX_CH_CTL_SYNC_PULSE_SKL(32);
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if (intel_tc_port_in_tbt_alt_mode(dig_port))
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