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clocksource: timer-riscv: Increase rating of clock_event_device for Sstc
When Sstc is available the RISC-V timer clock_event_device should be the preferred clock_event_device hence we increase clock_event_device rating for Sstc. Signed-off-by: Anup Patel <apatel@ventanamicro.com> Reviewed-by: Conor Dooley <conor.dooley@microchip.com> Acked-by: Palmer Dabbelt <palmer@rivosinc.com> Link: https://lore.kernel.org/r/20230710131902.1459180-3-apatel@ventanamicro.com Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
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@ -105,6 +105,8 @@ static int riscv_timer_starting_cpu(unsigned int cpu)
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ce->irq = riscv_clock_event_irq;
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if (riscv_timer_cannot_wake_cpu)
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ce->features |= CLOCK_EVT_FEAT_C3STOP;
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if (static_branch_likely(&riscv_sstc_available))
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ce->rating = 450;
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clockevents_config_and_register(ce, riscv_timebase, 100, 0x7fffffff);
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enable_percpu_irq(riscv_clock_event_irq,
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