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tools: Add riscv barrier implementation

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Many of the other architectures use their custom barrier implementations.
Use the barrier code from the kernel sources to optimize barriers in
tools.

Signed-off-by: Charlie Jenkins <charlie@rivosinc.com>
Reviewed-by: Andrea Parri <parri.andrea@gmail.com>
Link: https://lore.kernel.org/r/20240806-optimize_ring_buffer_read_riscv-v2-1-ca7e193ae198@rivosinc.com
Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
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Charlie Jenkins 2024-08-06 15:01:23 -07:00 committed by Palmer Dabbelt
parent 8400291e28
commit 6d74d178fe
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3 changed files with 54 additions and 0 deletions
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39
tools/arch/riscv/include/asm/barrier.h Normal file
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/* SPDX-License-Identifier: GPL-2.0-only */
/*
* Copied from the kernel sources to tools/arch/riscv:
*
* Copyright (C) 2012 ARM Ltd.
* Copyright (C) 2013 Regents of the University of California
* Copyright (C) 2017 SiFive
*/
#ifndef _TOOLS_LINUX_ASM_RISCV_BARRIER_H
#define _TOOLS_LINUX_ASM_RISCV_BARRIER_H
#include <asm/fence.h>
#include <linux/compiler.h>
/* These barriers need to enforce ordering on both devices and memory. */
#define mb() RISCV_FENCE(iorw, iorw)
#define rmb() RISCV_FENCE(ir, ir)
#define wmb() RISCV_FENCE(ow, ow)
/* These barriers do not need to enforce ordering on devices, just memory. */
#define smp_mb() RISCV_FENCE(rw, rw)
#define smp_rmb() RISCV_FENCE(r, r)
#define smp_wmb() RISCV_FENCE(w, w)
#define smp_store_release(p, v) \
do { \
RISCV_FENCE(rw, w); \
WRITE_ONCE(*p, v); \
} while (0)
#define smp_load_acquire(p) \
({ \
typeof(*p) ___p1 = READ_ONCE(*p); \
RISCV_FENCE(r, rw); \
___p1; \
})
#endif /* _TOOLS_LINUX_ASM_RISCV_BARRIER_H */

13
tools/arch/riscv/include/asm/fence.h Normal file
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/* SPDX-License-Identifier: GPL-2.0-only */
/*
* Copied from the kernel sources to tools/arch/riscv:
*/
#ifndef _ASM_RISCV_FENCE_H
#define _ASM_RISCV_FENCE_H
#define RISCV_FENCE_ASM(p, s) "\tfence " #p "," #s "\n"
#define RISCV_FENCE(p, s) \
({ __asm__ __volatile__ (RISCV_FENCE_ASM(p, s) : : : "memory"); })
#endif /* _ASM_RISCV_FENCE_H */

2
tools/include/asm/barrier.h
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@ -8,6 +8,8 @@
#include "../../arch/arm64/include/asm/barrier.h"
#elif defined(__powerpc__)
#include "../../arch/powerpc/include/asm/barrier.h"
#elif defined(__riscv)
#include "../../arch/riscv/include/asm/barrier.h"
#elif defined(__s390__)
#include "../../arch/s390/include/asm/barrier.h"
#elif defined(__sh__)