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pinctrl: sh-pfc: Updates for v5.8 (take two)
- Add support for the new RZ/G1H (r8a7742) SoC, - Minor fixes and improvements. -----BEGIN PGP SIGNATURE----- iHUEABYIAB0WIQQ9qaHoIs/1I4cXmEiKwlD9ZEnxcAUCXsU4BgAKCRCKwlD9ZEnx cLVzAP9GTdDrxNO4d9JceM3WvhsX/JrpXOOJjgjObAZj7AtN3AEA0iXhBsIOP7lN oiAYEWBTmaAVBvwaVWdvKT4AhLEv3wQ= =kdu0 -----END PGP SIGNATURE----- Merge tag 'sh-pfc-for-v5.8-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers into devel pinctrl: sh-pfc: Updates for v5.8 (take two) - Add support for the new RZ/G1H (r8a7742) SoC, - Minor fixes and improvements.
This commit is contained in:
commit
6fe7c07a9a
@ -13,6 +13,7 @@ Required Properties:
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- "renesas,pfc-emev2": for EMEV2 (EMMA Mobile EV2) compatible pin-controller.
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- "renesas,pfc-r8a73a4": for R8A73A4 (R-Mobile APE6) compatible pin-controller.
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- "renesas,pfc-r8a7740": for R8A7740 (R-Mobile A1) compatible pin-controller.
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- "renesas,pfc-r8a7742": for R8A7742 (RZ/G1H) compatible pin-controller.
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- "renesas,pfc-r8a7743": for R8A7743 (RZ/G1M) compatible pin-controller.
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- "renesas,pfc-r8a7744": for R8A7744 (RZ/G1N) compatible pin-controller.
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- "renesas,pfc-r8a7745": for R8A7745 (RZ/G1E) compatible pin-controller.
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@ -13344,7 +13344,7 @@ F: drivers/pinctrl/qcom/
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PIN CONTROLLER - RENESAS
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M: Geert Uytterhoeven <geert+renesas@glider.be>
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L: linux-renesas-soc@vger.kernel.org
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S: Maintained
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S: Supported
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T: git git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers.git sh-pfc
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F: Documentation/devicetree/bindings/pinctrl/renesas,*
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F: drivers/pinctrl/pinctrl-rz*
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@ -93,7 +93,7 @@ struct rza1_bidir_entry {
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};
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/**
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* rza1_swio_pin - describe a single pin that needs bidir flag applied.
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* rza1_swio_pin - describe a single pin that needs swio flag applied.
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*/
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struct rza1_swio_pin {
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u16 pin: 4;
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@ -12,6 +12,7 @@ config PINCTRL_SH_PFC
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select PINCTRL_PFC_EMEV2 if ARCH_EMEV2
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select PINCTRL_PFC_R8A73A4 if ARCH_R8A73A4
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select PINCTRL_PFC_R8A7740 if ARCH_R8A7740
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select PINCTRL_PFC_R8A7742 if ARCH_R8A7742
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select PINCTRL_PFC_R8A7743 if ARCH_R8A7743
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select PINCTRL_PFC_R8A7744 if ARCH_R8A7744
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select PINCTRL_PFC_R8A7745 if ARCH_R8A7745
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@ -74,6 +75,9 @@ config PINCTRL_PFC_R8A7740
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bool "R-Mobile A1 pin control support" if COMPILE_TEST
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select PINCTRL_SH_PFC_GPIO
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config PINCTRL_PFC_R8A7742
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bool "RZ/G1H pin control support" if COMPILE_TEST
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config PINCTRL_PFC_R8A7743
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bool "RZ/G1M pin control support" if COMPILE_TEST
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@ -4,6 +4,7 @@ obj-$(CONFIG_PINCTRL_SH_PFC_GPIO) += gpio.o
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obj-$(CONFIG_PINCTRL_PFC_EMEV2) += pfc-emev2.o
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obj-$(CONFIG_PINCTRL_PFC_R8A73A4) += pfc-r8a73a4.o
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obj-$(CONFIG_PINCTRL_PFC_R8A7740) += pfc-r8a7740.o
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obj-$(CONFIG_PINCTRL_PFC_R8A7742) += pfc-r8a7790.o
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obj-$(CONFIG_PINCTRL_PFC_R8A7743) += pfc-r8a7791.o
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obj-$(CONFIG_PINCTRL_PFC_R8A7744) += pfc-r8a7791.o
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obj-$(CONFIG_PINCTRL_PFC_R8A7745) += pfc-r8a7794.o
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@ -485,6 +485,12 @@ static const struct of_device_id sh_pfc_of_table[] = {
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.data = &r8a7740_pinmux_info,
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},
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#endif
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#ifdef CONFIG_PINCTRL_PFC_R8A7742
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{
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.compatible = "renesas,pfc-r8a7742",
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.data = &r8a7742_pinmux_info,
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},
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#endif
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#ifdef CONFIG_PINCTRL_PFC_R8A7743
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{
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.compatible = "renesas,pfc-r8a7743",
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@ -3938,7 +3938,11 @@ static const unsigned int vin3_clk_mux[] = {
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VI3_CLK_MARK,
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};
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static const struct sh_pfc_pin_group pinmux_groups[] = {
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static const struct {
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struct sh_pfc_pin_group common[289];
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struct sh_pfc_pin_group automotive[1];
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} pinmux_groups = {
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.common = {
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SH_PFC_PIN_GROUP(audio_clk_a),
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SH_PFC_PIN_GROUP(audio_clk_b),
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SH_PFC_PIN_GROUP(audio_clk_c),
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@ -4009,7 +4013,6 @@ static const struct sh_pfc_pin_group pinmux_groups[] = {
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SH_PFC_PIN_GROUP(intc_irq1),
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SH_PFC_PIN_GROUP(intc_irq2),
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SH_PFC_PIN_GROUP(intc_irq3),
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SH_PFC_PIN_GROUP(mlb_3pin),
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SH_PFC_PIN_GROUP(mmc0_data1),
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SH_PFC_PIN_GROUP(mmc0_data4),
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SH_PFC_PIN_GROUP(mmc0_data8),
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@ -4229,6 +4232,10 @@ static const struct sh_pfc_pin_group pinmux_groups[] = {
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SH_PFC_PIN_GROUP(vin3_field),
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SH_PFC_PIN_GROUP(vin3_clkenb),
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SH_PFC_PIN_GROUP(vin3_clk),
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},
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.automotive = {
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SH_PFC_PIN_GROUP(mlb_3pin),
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}
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};
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static const char * const audio_clk_groups[] = {
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@ -4689,7 +4696,11 @@ static const char * const vin3_groups[] = {
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"vin3_clk",
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};
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static const struct sh_pfc_function pinmux_functions[] = {
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static const struct {
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struct sh_pfc_function common[55];
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struct sh_pfc_function automotive[1];
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} pinmux_functions = {
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.common = {
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SH_PFC_FUNCTION(audio_clk),
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SH_PFC_FUNCTION(avb),
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SH_PFC_FUNCTION(du),
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@ -4708,7 +4719,6 @@ static const struct sh_pfc_function pinmux_functions[] = {
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SH_PFC_FUNCTION(iic2),
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SH_PFC_FUNCTION(iic3),
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SH_PFC_FUNCTION(intc),
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SH_PFC_FUNCTION(mlb),
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SH_PFC_FUNCTION(mmc0),
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SH_PFC_FUNCTION(mmc1),
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SH_PFC_FUNCTION(msiof0),
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@ -4746,6 +4756,10 @@ static const struct sh_pfc_function pinmux_functions[] = {
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SH_PFC_FUNCTION(vin1),
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SH_PFC_FUNCTION(vin2),
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SH_PFC_FUNCTION(vin3),
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},
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.automotive = {
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SH_PFC_FUNCTION(mlb),
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}
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};
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static const struct pinmux_cfg_reg pinmux_config_regs[] = {
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@ -5736,6 +5750,29 @@ static const struct sh_pfc_soc_operations r8a7790_pinmux_ops = {
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.pin_to_pocctrl = r8a7790_pin_to_pocctrl,
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};
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#ifdef CONFIG_PINCTRL_PFC_R8A7742
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const struct sh_pfc_soc_info r8a7742_pinmux_info = {
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.name = "r8a77420_pfc",
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.ops = &r8a7790_pinmux_ops,
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.unlock_reg = 0xe6060000, /* PMMR */
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.function = { PINMUX_FUNCTION_BEGIN, PINMUX_FUNCTION_END },
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.pins = pinmux_pins,
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.nr_pins = ARRAY_SIZE(pinmux_pins),
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.groups = pinmux_groups.common,
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.nr_groups = ARRAY_SIZE(pinmux_groups.common),
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.functions = pinmux_functions.common,
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.nr_functions = ARRAY_SIZE(pinmux_functions.common),
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.cfg_regs = pinmux_config_regs,
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.pinmux_data = pinmux_data,
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.pinmux_data_size = ARRAY_SIZE(pinmux_data),
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};
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#endif
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#ifdef CONFIG_PINCTRL_PFC_R8A7790
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const struct sh_pfc_soc_info r8a7790_pinmux_info = {
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.name = "r8a77900_pfc",
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.ops = &r8a7790_pinmux_ops,
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@ -5745,13 +5782,16 @@ const struct sh_pfc_soc_info r8a7790_pinmux_info = {
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.pins = pinmux_pins,
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.nr_pins = ARRAY_SIZE(pinmux_pins),
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.groups = pinmux_groups,
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.nr_groups = ARRAY_SIZE(pinmux_groups),
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.functions = pinmux_functions,
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.nr_functions = ARRAY_SIZE(pinmux_functions),
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.groups = pinmux_groups.common,
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.nr_groups = ARRAY_SIZE(pinmux_groups.common) +
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ARRAY_SIZE(pinmux_groups.automotive),
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.functions = pinmux_functions.common,
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.nr_functions = ARRAY_SIZE(pinmux_functions.common) +
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ARRAY_SIZE(pinmux_functions.automotive),
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.cfg_regs = pinmux_config_regs,
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.pinmux_data = pinmux_data,
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.pinmux_data_size = ARRAY_SIZE(pinmux_data),
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};
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#endif
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@ -304,6 +304,7 @@ struct sh_pfc_soc_info {
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extern const struct sh_pfc_soc_info emev2_pinmux_info;
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extern const struct sh_pfc_soc_info r8a73a4_pinmux_info;
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extern const struct sh_pfc_soc_info r8a7740_pinmux_info;
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extern const struct sh_pfc_soc_info r8a7742_pinmux_info;
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extern const struct sh_pfc_soc_info r8a7743_pinmux_info;
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extern const struct sh_pfc_soc_info r8a7744_pinmux_info;
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extern const struct sh_pfc_soc_info r8a7745_pinmux_info;
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