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https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git
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ARM: timer-sp: convert to use CLKSRC_OF init
This adds CLKSRC_OF based init for sp804 timer. The clock initialization is refactored to support retrieving the clock(s) from the DT. Signed-off-by: Rob Herring <rob.herring@calxeda.com>
This commit is contained in:
parent
d71956960c
commit
7a0eca7121
@ -1173,6 +1173,7 @@ config PLAT_VERSATILE
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config ARM_TIMER_SP804
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bool
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select CLKSRC_MMIO
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select CLKSRC_OF if OF
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select HAVE_SCHED_CLOCK
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source arch/arm/mm/Kconfig
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@ -25,33 +25,28 @@
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#include <linux/interrupt.h>
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#include <linux/irq.h>
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#include <linux/io.h>
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#include <linux/of.h>
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#include <linux/of_address.h>
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#include <linux/of_irq.h>
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#include <asm/sched_clock.h>
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#include <asm/hardware/arm_timer.h>
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static long __init sp804_get_clock_rate(const char *name)
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static long __init sp804_get_clock_rate(struct clk *clk)
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{
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struct clk *clk;
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long rate;
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int err;
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clk = clk_get_sys("sp804", name);
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if (IS_ERR(clk)) {
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pr_err("sp804: %s clock not found: %d\n", name,
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(int)PTR_ERR(clk));
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return PTR_ERR(clk);
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}
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err = clk_prepare(clk);
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if (err) {
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pr_err("sp804: %s clock failed to prepare: %d\n", name, err);
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pr_err("sp804: clock failed to prepare: %d\n", err);
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clk_put(clk);
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return err;
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}
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err = clk_enable(clk);
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if (err) {
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pr_err("sp804: %s clock failed to enable: %d\n", name, err);
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pr_err("sp804: clock failed to enable: %d\n", err);
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clk_unprepare(clk);
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clk_put(clk);
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return err;
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@ -59,7 +54,7 @@ static long __init sp804_get_clock_rate(const char *name)
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rate = clk_get_rate(clk);
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if (rate < 0) {
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pr_err("sp804: %s clock failed to get rate: %ld\n", name, rate);
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pr_err("sp804: clock failed to get rate: %ld\n", rate);
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clk_disable(clk);
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clk_unprepare(clk);
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clk_put(clk);
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@ -77,9 +72,21 @@ static u32 sp804_read(void)
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void __init __sp804_clocksource_and_sched_clock_init(void __iomem *base,
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const char *name,
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struct clk *clk,
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int use_sched_clock)
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{
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long rate = sp804_get_clock_rate(name);
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long rate;
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if (!clk) {
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clk = clk_get_sys("sp804", name);
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if (IS_ERR(clk)) {
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pr_err("sp804: clock not found: %d\n",
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(int)PTR_ERR(clk));
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return;
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}
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}
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rate = sp804_get_clock_rate(clk);
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if (rate < 0)
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return;
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@ -171,12 +178,20 @@ static struct irqaction sp804_timer_irq = {
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.dev_id = &sp804_clockevent,
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};
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void __init sp804_clockevents_init(void __iomem *base, unsigned int irq,
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const char *name)
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void __init __sp804_clockevents_init(void __iomem *base, unsigned int irq, struct clk *clk, const char *name)
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{
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struct clock_event_device *evt = &sp804_clockevent;
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long rate = sp804_get_clock_rate(name);
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long rate;
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if (!clk)
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clk = clk_get_sys("sp804", name);
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if (IS_ERR(clk)) {
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pr_err("sp804: %s clock not found: %d\n", name,
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(int)PTR_ERR(clk));
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return;
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}
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rate = sp804_get_clock_rate(clk);
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if (rate < 0)
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return;
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@ -186,6 +201,64 @@ void __init sp804_clockevents_init(void __iomem *base, unsigned int irq,
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evt->irq = irq;
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evt->cpumask = cpu_possible_mask;
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writel(0, base + TIMER_CTRL);
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setup_irq(irq, &sp804_timer_irq);
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clockevents_config_and_register(evt, rate, 0xf, 0xffffffff);
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}
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static void __init sp804_of_init(struct device_node *np)
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{
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static bool initialized = false;
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void __iomem *base;
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int irq;
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u32 irq_num = 0;
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struct clk *clk1, *clk2;
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const char *name = of_get_property(np, "compatible", NULL);
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base = of_iomap(np, 0);
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if (WARN_ON(!base))
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return;
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/* Ensure timers are disabled */
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writel(0, base + TIMER_CTRL);
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writel(0, base + TIMER_2_BASE + TIMER_CTRL);
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if (initialized || !of_device_is_available(np))
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goto err;
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clk1 = of_clk_get(np, 0);
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if (IS_ERR(clk1))
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clk1 = NULL;
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/* Get the 2nd clock if the timer has 2 timer clocks */
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if (of_count_phandle_with_args(np, "clocks", "#clock-cells") == 3) {
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clk2 = of_clk_get(np, 1);
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if (IS_ERR(clk2)) {
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pr_err("sp804: %s clock not found: %d\n", np->name,
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(int)PTR_ERR(clk2));
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goto err;
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}
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} else
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clk2 = clk1;
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irq = irq_of_parse_and_map(np, 0);
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if (irq <= 0)
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goto err;
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of_property_read_u32(np, "arm,sp804-has-irq", &irq_num);
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if (irq_num == 2) {
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__sp804_clockevents_init(base + TIMER_2_BASE, irq, clk2, name);
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__sp804_clocksource_and_sched_clock_init(base, name, clk1, 1);
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} else {
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__sp804_clockevents_init(base, irq, clk1 , name);
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__sp804_clocksource_and_sched_clock_init(base + TIMER_2_BASE,
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name, clk2, 1);
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}
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initialized = true;
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return;
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err:
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iounmap(base);
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}
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CLOCKSOURCE_OF_DECLARE(sp804, "arm,sp804", sp804_of_init);
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@ -1,15 +1,23 @@
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struct clk;
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void __sp804_clocksource_and_sched_clock_init(void __iomem *,
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const char *, int);
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const char *, struct clk *, int);
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void __sp804_clockevents_init(void __iomem *, unsigned int,
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struct clk *, const char *);
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static inline void sp804_clocksource_init(void __iomem *base, const char *name)
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{
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__sp804_clocksource_and_sched_clock_init(base, name, 0);
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__sp804_clocksource_and_sched_clock_init(base, name, NULL, 0);
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}
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static inline void sp804_clocksource_and_sched_clock_init(void __iomem *base,
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const char *name)
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{
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__sp804_clocksource_and_sched_clock_init(base, name, 1);
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__sp804_clocksource_and_sched_clock_init(base, name, NULL, 1);
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}
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void sp804_clockevents_init(void __iomem *, unsigned int, const char *);
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static inline void sp804_clockevents_init(void __iomem *base, unsigned int irq, const char *name)
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{
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__sp804_clockevents_init(base, irq, NULL, name);
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}
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